diff options
| author | Ben Zhang <benzh@chromium.org> | 2014-11-17 17:21:09 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-04 12:40:26 +0200 |
| commit | 573429b09dafa94dac4e1c2b0d9ed33d64676963 (patch) | |
| tree | bff30eb05909adc401dc3d39d8c1b01f53b09bd9 /src | |
| parent | f208905fda0784111b494771f2c60d76eefebdc7 (diff) | |
samus: Set codec PDM clock output to 3MHz
Currently the rt5677 codec outputs 6MHz PDM clock which is
out-of-spec for the speaker amp SSM2537. The amp's GAIN_FS
pin is pulled down to PGND with a 47k resistor, so the
expected PDM clock is 64*FS (~3MHz) according to its datasheet.
The corresponding kernel patch that adds the PDM clock config
option is https://chromium-review.googlesource.com/#/c/230303/
BUG=chrome-os-partner:33303
BRANCH=samus
TEST=flash coreboot with this patch and see PDM CLK went
from 6MHz to 3MHz on samus with a scope.
Change-Id: Icf2c61930175bede1ee8ebc2b0fb17c2938b806c
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: b9ba4597515b2fbcc72fa22e296357c454175648
Original-Change-Id: I09acdf47bab4f641981491a84197de234918435e
Original-Signed-off-by: Ben Zhang <benzh@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/230344
Original-Reviewed-by: Dylan Reid <dgreid@chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9277
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/samus/acpi/mainboard.asl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/samus/acpi/mainboard.asl b/src/mainboard/google/samus/acpi/mainboard.asl index 39797e5ce1..2b6cea0b0e 100644 --- a/src/mainboard/google/samus/acpi/mainboard.asl +++ b/src/mainboard/google/samus/acpi/mainboard.asl @@ -170,6 +170,7 @@ Scope (\_SB.PCI0.I2C0) Name (WAKE, 45) /* DSP_INT (use as codec wake) */ Name (DCLK, 0) /* RT5677_DMIC_CLK1 */ + Name (PCLK, 1) /* RT5677_PDM_CLK_DIV2 (~3MHz) */ Name (IN1, 1) /* IN1 differential */ Name (IN2, 0) /* IN2 not differential */ Name (OUT1, 1) /* LOUT1 differential */ |