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authorRyan Chuang <ryan.chuang@mediatek.corp-partner.google.com>2021-12-27 12:44:12 +0800
committerHung-Te Lin <hungte@chromium.org>2021-12-29 07:52:06 +0000
commit550c0723653626beeae2d29d42e9cbfc2268e1d6 (patch)
tree31d5f6dc7f1874c935b75882f566cd3b0a023c9e /src
parent31531eab35982c212d29724cdacdec59bc8a9c81 (diff)
mb/google/corsola: Fully calibrate DRAM
Initialize and calibrate DRAM in romstage. DRAM full calibration logs: dram_init: dram init end (result: 1) DRAM-K: Full calibration passed in 20014 msecs TEST=DRAM full calibration pass. BUG=b:202871018 Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.corp-partner.google.com> Change-Id: I80a18a8be5b1d47a5f0f7afed9601c0884e69035 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60386 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/corsola/Makefile.inc1
-rw-r--r--src/mainboard/google/corsola/romstage.c2
-rw-r--r--src/mainboard/google/corsola/sdram_configs.c15
3 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/corsola/Makefile.inc b/src/mainboard/google/corsola/Makefile.inc
index 1a9a1c28b4..e1e363c4ed 100644
--- a/src/mainboard/google/corsola/Makefile.inc
+++ b/src/mainboard/google/corsola/Makefile.inc
@@ -11,6 +11,7 @@ romstage-y += boardid.c
romstage-y += chromeos.c
romstage-y += regulator.c
romstage-y += romstage.c
+romstage-y += sdram_configs.c
ramstage-y += memlayout.ld
ramstage-y += boardid.c
diff --git a/src/mainboard/google/corsola/romstage.c b/src/mainboard/google/corsola/romstage.c
index aff496b563..8d03b5b54c 100644
--- a/src/mainboard/google/corsola/romstage.c
+++ b/src/mainboard/google/corsola/romstage.c
@@ -3,6 +3,7 @@
#include <arch/stages.h>
#include <console/console.h>
#include <delay.h>
+#include <soc/emi.h>
#include <soc/mt6366.h>
#include <soc/pll_common.h>
#include <soc/regulator.h>
@@ -26,4 +27,5 @@ void platform_romstage_main(void)
mt6366_init();
raise_little_cpu_freq();
rtc_boot();
+ mtk_dram_init();
}
diff --git a/src/mainboard/google/corsola/sdram_configs.c b/src/mainboard/google/corsola/sdram_configs.c
new file mode 100644
index 0000000000..f565f53f82
--- /dev/null
+++ b/src/mainboard/google/corsola/sdram_configs.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+const struct sdram_info *get_sdram_config(void)
+{
+ /*
+ * The MT8186 platform supports "dram adaptive" feature to
+ * automatically detect dram information, including channel, rank, die size...,
+ * and can automatically configure EMI settings.
+ * So we will be passing a placeholder param blob.
+ */
+ static struct sdram_info params;
+ return &params;
+}