diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-14 01:18:14 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:37:42 +0000 |
| commit | 50a6fe73c6304077a959c483d0d31054ce7177b2 (patch) | |
| tree | 2b07da85ad8e8c423764b7b956a8b90d0ebaac5f /src | |
| parent | 4c79f930828be3f54da2affacf667267e44158e2 (diff) | |
nb/intel/sandybridge: Remove unnecessary per-rank loops
The IOSAV_By_BW_MASK_ch registers are not per-rank. To preserve original
behavior, use a for-populated-channels loop instead of for-all-channels.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: I6db35c41cd05420ceaeda93255f5ed73598a5bdd
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47609
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 23eab153ed..b67eb564ca 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -1403,7 +1403,7 @@ int read_training(ramctr_timing *ctrl) FOR_ALL_POPULATED_CHANNELS { program_timings(ctrl, channel); } - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } return 0; @@ -2030,7 +2030,7 @@ int write_training(ramctr_timing *ctrl) precharge(ctrl); printram("CPF\n"); - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } @@ -2053,7 +2053,7 @@ int write_training(ramctr_timing *ctrl) FOR_ALL_POPULATED_CHANNELS program_timings(ctrl, channel); - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } return 0; @@ -2470,7 +2470,7 @@ int read_mpr_training(ramctr_timing *ctrl) program_timings(ctrl, channel); } - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } return 0; @@ -2604,7 +2604,7 @@ int discover_edges_write(ramctr_timing *ctrl) FOR_ALL_POPULATED_CHANNELS program_timings(ctrl, channel); - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } return 0; @@ -3095,7 +3095,7 @@ void final_registers(ramctr_timing *ctrl) void restore_timings(ramctr_timing *ctrl) { - int channel, slotrank, lane; + int channel, lane; FOR_ALL_POPULATED_CHANNELS { MCHBAR32(TC_RAP_ch(channel)) = @@ -3114,7 +3114,7 @@ void restore_timings(ramctr_timing *ctrl) wait_for_iosav(channel); } - FOR_ALL_CHANNELS FOR_ALL_POPULATED_RANKS FOR_ALL_LANES { + FOR_ALL_POPULATED_CHANNELS FOR_ALL_LANES { MCHBAR32(IOSAV_By_BW_MASK_ch(channel, lane)) = 0; } |