soc/amd/common/acpi, mb/google/skyrim: Implement DTTS Proposal

DTTS indicated Dynamic Thermal Table Switching.The proposal would like
to develop the schematic for switching 6 thermal table by lid status,
machine body mode and temperature. After entering the OS, the thermal
table would be table A. If the “Motion” or “Lid status change” is
detected. The thermal table would switch to laptop mode or lid close
mode.

Once the higher environment temperatures are detected,the thermal
table would switch to the corresponding power throttle table (B, D or
F). Based on these table switching mechanisms, no matter how the
end-user uses Chromebook,they could enjoy more humanized thermal
designs.

              Release     Over         Over      Release            .
              Temp.       Temp.        Temp.     Temp.              .
--------------------------------------------------------            .
Desktop mode  Table A     Table B      50C       45C                .
Lid open      (Default)                                             .
--------------------------------------------------------            .
Desktop mode  Table C     Table D      55C       50C                .
Lid close                                                           .
--------------------------------------------------------            .
Laptop mode   Table E     Table F      45C       40C                .
--------------------------------------------------------            .

On the proposal, the transmission rules are list below:
1. Table A is the default table after booting.
2. A, C, E (Release Temp) can switch to each other.
3. B, D, F (Over Temp) can switch to each other.
4. A and B, C and D, E and F can switch to each other.
5. If Lid open/close or mode switch event trigger, temperature release
tables will translation to each other, temperature over tables will
translation to each other.After that event trigger, EC will check the
new temperature condition and decide if the temperature need to be
trigger.For example, if table A will switch to table D, table A will
switch to C with Lid close event, if temperature is over 55C, EC will
trigger temperature to switch form table C to D.
6. EC will trigger 3 times body-detection events during power on boot
without any body-mode and lid status change. For this case if the
previous table label is on same group, we will based on the temperature
to decide the table.

For example, assume table A is current table. When the temperature
reaches 50C, than the table is switched from A to B. The current table
is B. When the temperature is downgrade below 45C, the table is
switched form B to A. The same rule is for C and D, E and F.

BRANCH=none
BUG=b:232946420
TEST=emerge-skyrim coreboot

Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com>
Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>

3 files changed, 123 insertions, 0 deletions

diff --git a/src/mainboard/google/skyrim/dsdt.asl b/src/mainboard/google/skyrim/dsdt.asl
index 39399d8eb7..7293683705 100644
--- a/src/mainboard/google/skyrim/dsdt.asl
+++ b/src/mainboard/google/skyrim/dsdt.asl
@@ -14,6 +14,9 @@ DefinitionBlock (
 {
 	#include <acpi/dsdt_top.asl>
 	#include <soc.asl>
+#if CONFIG(FEATURE_DYNAMIC_DPTC)
+	#include <variant/acpi/dtts.asl>
+#endif
 
 	/* ChromeOS Embedded Controller */
 	Scope (\_SB.PCI0.LPCB)
diff --git a/src/mainboard/google/skyrim/variants/winterhold/include/variant/acpi/dtts.asl b/src/mainboard/google/skyrim/variants/winterhold/include/variant/acpi/dtts.asl
new file mode 100644
index 0000000000..733af28943
--- /dev/null
+++ b/src/mainboard/google/skyrim/variants/winterhold/include/variant/acpi/dtts.asl
@@ -0,0 +1,116 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+External(\_SB.DTTB, MethodObj)
+External(\_SB.DTTC, MethodObj)
+External(\_SB.DTTD, MethodObj)
+External(\_SB.DTTE, MethodObj)
+External(\_SB.DTTF, MethodObj)
+
+Scope (\_SB)
+{
+    //---------------------------------------------
+    // Table | A | B | C | D | E | F | First boot |
+    //---------------------------------------------
+    // PRTN  | 0 | 1 | 2 | 3 | 4 | 5 |     7      |
+    //---------------------------------------------
+    Name (PRTN, 7)
+
+    Method (DTTS, 0, Serialized)
+    {
+        // Set table A as default table after power on device
+        If (\_SB.PRTN == 7)
+        {
+            \_SB.DDEF()
+            Store (0, \_SB.PRTN)
+            Return (Zero)
+        }
+
+        If (\_SB.PCI0.LPCB.EC0.STTB == 0) { // Desktop
+            If (\_SB.PCI0.LPCB.EC0.LIDS == 1) { // Lid-open
+                // Table A/B
+                If ((\_SB.PRTN == 0) || (\_SB.PRTN == 1)) {
+                    // AMB sensor trigger point
+                    // 50C will store 123(0x7B) in mapped memory
+                    // 50C=323K, 323-200(offset)=123(0x7B)
+                    If (\_SB.PCI0.LPCB.EC0.TIN4 >= 123) {
+                        \_SB.DTTB()
+                        Store (1, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                    // AMB sensor release point
+                    If ((\_SB.PCI0.LPCB.EC0.TIN4 <= 118)) {
+                        \_SB.DDEF()
+                        Store (0, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                    // Keep tht previous thermal table
+                    Return (Zero)
+                } Else {
+                    If (\_SB.PRTN == 3 || \_SB.PRTN == 5) {
+                        \_SB.DTTB()
+                        Store (1, \_SB.PRTN)
+                        Return (Zero)
+                    } Else {
+                        \_SB.DDEF()
+                        Store (0, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                }
+            } Else { // Lid-close
+                // Table C/D
+                If (\_SB.PRTN == 2 || \_SB.PRTN == 3) {
+                    If (\_SB.PCI0.LPCB.EC0.TIN4 >= 128) {
+                        \_SB.DTTD()
+                        Store (3, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                    If(\_SB.PCI0.LPCB.EC0.TIN4 <= 123) {
+                        \_SB.DTTC()
+                        Store (2, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                    // Keep tht previous thermal table
+                    Return (Zero)
+                } Else {
+                    If (\_SB.PRTN == 1 || \_SB.PRTN == 5) {
+                        \_SB.DTTD()
+                        Store (3, \_SB.PRTN)
+                        Return (Zero)
+                    } Else {
+                        \_SB.DTTC()
+                        Store (2, \_SB.PRTN)
+                        Return (Zero)
+                    }
+                }
+            }
+        } Else { // Laptop
+            // Table E/F
+            If (\_SB.PRTN == 4 || \_SB.PRTN == 5) {
+                // AMB sensor trigger point
+                If (\_SB.PCI0.LPCB.EC0.TIN4 >= 118) {
+                    \_SB.DTTF()
+                    Store (5, \_SB.PRTN)
+                    Return (Zero)
+                }
+                // AMB sensor release point
+                If ((\_SB.PCI0.LPCB.EC0.TIN4 <= 113)) {
+                    \_SB.DTTE()
+                    Store (4, \_SB.PRTN)
+                    Return (Zero)
+                }
+                // Keep tht previous thermal table
+                Return (Zero)
+            } Else {
+                If (\_SB.PRTN == 1 || \_SB.PRTN == 3) {
+                    \_SB.DTTF()
+                    Store (5, \_SB.PRTN)
+                    Return (Zero)
+                } Else {
+                    \_SB.DTTE()
+                    Store (4, \_SB.PRTN)
+                    Return (Zero)
+                }
+            }
+        } // Desktop/Laptop End
+    }
+}
diff --git a/src/soc/amd/common/acpi/dptc.asl b/src/soc/amd/common/acpi/dptc.asl
index e97aade50c..d4e5c2ee7c 100644
--- a/src/soc/amd/common/acpi/dptc.asl
+++ b/src/soc/amd/common/acpi/dptc.asl
@@ -31,7 +31,11 @@ Scope (\_SB)
             Return (Zero)
         }
 
+#if CONFIG(FEATURE_DYNAMIC_DPTC)
+        \_SB.DTTS()
+#else
         \_SB.DDEF()
+#endif
         Return (Zero)
     }
 }