diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-24 08:34:39 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-26 01:16:44 +0000 |
| commit | 3de8f8c137f336ec2b96114303cee873ac636762 (patch) | |
| tree | c57334477b64584649f8c064a1342927fd8f9874 /src | |
| parent | da33246bc53ec1bfa093b991e263a9629920bc37 (diff) | |
cpu/amd/pi/00730F01: Clean up microcode update from __PRE_RAM__
It is only called in ramstage. Even if it was called in
romstage, execution flow is such that BSP and AP CPUs
should not be able to enter update_microcode() routine
concurrently.
Also the Kconfig guarding the spin_lock() calls are not
selected nor are the lock variables declared for these
platforms.
Change-Id: I1c2e106f10e8420e942b3ed082c677c0db95557c
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35586
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cpu/amd/pi/00730F01/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/cpu/amd/pi/00730F01/microcode_fam16h.c | 27 |
2 files changed, 1 insertions, 28 deletions
diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index 5e49869de7..c4a92cf65d 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -12,8 +12,6 @@ # romstage-y += fixme.c -romstage-y += update_microcode.c -romstage-y += microcode_fam16h.c ramstage-y += fixme.c ramstage-y += chip_name.c diff --git a/src/cpu/amd/pi/00730F01/microcode_fam16h.c b/src/cpu/amd/pi/00730F01/microcode_fam16h.c index 1251c38fea..1f1dbd90d1 100644 --- a/src/cpu/amd/pi/00730F01/microcode_fam16h.c +++ b/src/cpu/amd/pi/00730F01/microcode_fam16h.c @@ -16,8 +16,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/microcode.h> #include <cbfs.h> -#include <arch/io.h> -#include <smp/spinlock.h> /* * Values and header structure from: @@ -122,22 +120,12 @@ void amd_update_microcode_from_cbfs(uint32_t equivalent_processor_rev_id) "Skipping microcode patch!\n"); return; } -#ifdef __PRE_RAM__ -#if CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) - spin_lock(romstage_microcode_cbfs_lock()); -#endif -#endif ucode = cbfs_boot_map_with_leak("cpu_microcode_blob.bin", CBFS_TYPE_MICROCODE, &ucode_len); if (!ucode) { printk(BIOS_DEBUG, "cpu_microcode_blob.bin not found. " "Skipping updates.\n"); -#ifdef __PRE_RAM__ -#if CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) - spin_unlock(romstage_microcode_cbfs_lock()); -#endif -#endif return; } @@ -145,21 +133,8 @@ void amd_update_microcode_from_cbfs(uint32_t equivalent_processor_rev_id) ucode_len < F16H_MPB_DATA_OFFSET) { printk(BIOS_DEBUG, "microcode file invalid. Skipping " "updates.\n"); -#ifdef __PRE_RAM__ -#if CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) - spin_unlock(romstage_microcode_cbfs_lock()); -#endif -#endif return; } - amd_update_microcode(ucode, ucode_len, - equivalent_processor_rev_id); - -#ifdef __PRE_RAM__ -#if CONFIG(HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK) - spin_unlock(romstage_microcode_cbfs_lock()); -#endif -#endif - + amd_update_microcode(ucode, ucode_len, equivalent_processor_rev_id); } |