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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-08-27 12:10:50 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-08-27 12:10:50 +0000
commit39ec29c47ef056f83500a5f1efdbf6b37f9a1f77 (patch)
treee0cc51a9d78a58769c0d2109a89f4dbd691335a9 /src
parent20c03fb923730f81e04b1e3ab997041eeb55d45f (diff)
Clean up some DCACHE related options.
In amd/serengeti_cheetah there were duplicates, and USE_DCACHE_RAM is a boolean value, so make it so. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4596 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/cpu/Kconfig4
-rw-r--r--src/mainboard/amd/serengeti_cheetah/Kconfig26
-rw-r--r--src/mainboard/asus/m2v-mx_se/Kconfig6
3 files changed, 6 insertions, 30 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index 516cac05c4..3f7d606c4c 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -5,6 +5,10 @@ source src/cpu/via/Kconfig
source src/cpu/x86/Kconfig
source src/cpu/ppc/Kconfig
+config USE_DCACHE_RAM
+ bool
+ default n
+
config DCACHE_RAM_BASE
hex
default 0xffdf8000 if CPU_INTEL_CORE
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig
index 5884dafbff..3be6605a14 100644
--- a/src/mainboard/amd/serengeti_cheetah/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah/Kconfig
@@ -14,6 +14,7 @@ config BOARD_AMD_SERENGETI_CHEETAH
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
help
AMD Serengeti Cheetah mainboard.
endchoice
@@ -23,11 +24,6 @@ config MAINBOARD_DIR
default amd/serengeti_cheetah
depends on BOARD_AMD_SERENGETI_CHEETAH
-config USE_DCACHE_RAM
- int
- default 1
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
config DCACHE_RAM_BASE
hex
default 0xc8000
@@ -83,26 +79,6 @@ config PCI_64BIT_PREF_MEM
default 0
depends on BOARD_AMD_SERENGETI_CHEETAH
-config USE_DCACHE_RAM
- int
- default 1
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_BASE
- hex
- default 0xc8000
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_SIZE
- hex
- default 0x08000
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config DCACHE_RAM_GLOBAL_VAR_SIZE
- hex
- default 0x01000
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
config USE_FAILOVER_IMAGE
int
default 0
diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig
index 0dc3bf17b7..c68db479c7 100644
--- a/src/mainboard/asus/m2v-mx_se/Kconfig
+++ b/src/mainboard/asus/m2v-mx_se/Kconfig
@@ -29,6 +29,7 @@ config BOARD_ASUS_M2V_MX_SE
select SOUTHBRIDGE_VIA_K8T890
select SUPERIO_ITE_IT8712F
select USE_PRINTK_IN_CAR
+ select USE_DCACHE_RAM
help
Asus M2V-MX-SE mainboard.
@@ -37,11 +38,6 @@ config MAINBOARD_DIR
default asus/m2v-mx_se
depends on BOARD_ASUS_M2V_MX_SE
-config USE_DCACHE_RAM
- bool
- dafault y
- depends on BOARD_ASUS_M2V_MX_SE
-
config DCACHE_RAM_BASE
hex
default 0xcc000