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authorBora Guvendik <bora.guvendik@intel.com>2023-03-30 13:54:36 -0700
committerFelix Held <felix-coreboot@felixheld.de>2023-05-10 13:07:17 +0000
commit396201c1ef52c14777a756d1962e18251a338076 (patch)
treec7df12bed959b0fc49a26fe70a5cc780fe73b6d0 /src
parent15e7499cdd7cd5e38fb27eaa9a5f42123fb8995a (diff)
soc/intel/cmn/pcie: Allow SoC to overwrite snoop/non-snoop latency
The Intel SoC Meteor Lake requires a higher pcie max non-snoop and snoop latency tolerance. Add config to let SoC overwrite the common code settings if needed. BUG=none TEST=Boot google/rex and print/check if able to overwrite values. Change-Id: Ic2b9a158d219e6c6e7f6e7f0ae0f093c1183b402 Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74141 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/common/block/pcie/Kconfig12
-rw-r--r--src/soc/intel/common/block/pcie/pcie.c4
2 files changed, 14 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/pcie/Kconfig b/src/soc/intel/common/block/pcie/Kconfig
index 859ba22eab..f65d8c16f3 100644
--- a/src/soc/intel/common/block/pcie/Kconfig
+++ b/src/soc/intel/common/block/pcie/Kconfig
@@ -17,6 +17,18 @@ config PCIEXP_CLK_PM
config PCIEXP_L1_SUB_STATE
default y
+config PCIE_LTR_MAX_SNOOP_LATENCY
+ hex
+ default 0x1003
+ help
+ Latency tolerance reporting, max snoop latency value defaults to 3.14 ms.
+
+config PCIE_LTR_MAX_NO_SNOOP_LATENCY
+ hex
+ default 0x1003
+ help
+ Latency tolerance reporting, max non-snoop latency value defaults to 3.14 ms.
+
endif # SOC_INTEL_COMMON_BLOCK_PCIE
config PCIE_DEBUG_INFO
diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c
index c8a958d70d..d5d3322581 100644
--- a/src/soc/intel/common/block/pcie/pcie.c
+++ b/src/soc/intel/common/block/pcie/pcie.c
@@ -48,8 +48,8 @@ static void pch_pcie_init(struct device *dev)
static void pcie_get_ltr_max_latencies(u16 *max_snoop, u16 *max_nosnoop)
{
- *max_snoop = PCIE_LTR_MAX_SNOOP_LATENCY_3146US;
- *max_nosnoop = PCIE_LTR_MAX_NO_SNOOP_LATENCY_3146US;
+ *max_snoop = CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY;
+ *max_nosnoop = CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY;
}
static struct pci_operations pcie_ops = {