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authorNico Huber <nico.h@gmx.de>2018-05-27 14:32:27 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-06-04 08:20:35 +0000
commit36ec3e9ba1b89416d87426eabe496d67dbb2cdbf (patch)
treed0a982f07df42bb3115e46e211a847ae9a78fac0 /src
parentb5211ef2e7da1c1b8f8bb0208e7b2f44aa859ef7 (diff)
arch/x86: Introduce postcar_frame_add_romcache()
Provide a common implementation to add an MTRR entry for memory- mapped boot ROMs. Change-Id: I9fabc6b87fb36dc3d970805eb804cd950b8849d4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src')
-rw-r--r--src/arch/x86/include/arch/cpu.h5
-rw-r--r--src/arch/x86/postcar_loader.c7
2 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index 5d44aaeb6c..5f11c9dc0c 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -283,6 +283,11 @@ void postcar_frame_add_mtrr(struct postcar_frame *pcf,
uintptr_t addr, size_t size, int type);
/*
+ * Add variable MTRR covering the memory-mapped ROM with given MTRR type.
+ */
+void postcar_frame_add_romcache(struct postcar_frame *pcf, int type);
+
+/*
* Push used MTRR and Max MTRRs on to the stack
* and return pointer to stack top.
*/
diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c
index 11f048de7a..1877108ed0 100644
--- a/src/arch/x86/postcar_loader.c
+++ b/src/arch/x86/postcar_loader.c
@@ -113,6 +113,13 @@ void postcar_frame_add_mtrr(struct postcar_frame *pcf,
}
}
+void postcar_frame_add_romcache(struct postcar_frame *pcf, int type)
+{
+ if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED))
+ return;
+ postcar_frame_add_mtrr(pcf, CACHE_ROM_BASE, CACHE_ROM_SIZE, type);
+}
+
void *postcar_commit_mtrrs(struct postcar_frame *pcf)
{
/*