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authorStefan Reinauer <stepan@coresystems.de>2010-05-21 20:40:38 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-05-21 20:40:38 +0000
commit36de0424f2dd7376cf801a6f02d9842d59d9fac2 (patch)
tree1faa98262e8fdf4b5356ac7d1034a4002ea245c6 /src
parent1c0c6372a9ecbaec6ee9504e47824d6481a0e977 (diff)
Add "reasonable" values in ASL at places we overwrite from
coreboot later. Current ASL compilers check for validity and complain about the dummy values. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/amd/dbm690t/dsdt.asl22
-rw-r--r--src/mainboard/amd/mahogany/dsdt.asl22
-rw-r--r--src/mainboard/amd/mahogany_fam10/dsdt.asl22
-rw-r--r--src/mainboard/amd/pistachio/dsdt.asl22
-rw-r--r--src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/dsdt.asl4
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl4
-rw-r--r--src/mainboard/amd/tilapia_fam10/dsdt.asl22
-rw-r--r--src/mainboard/asrock/939a785gmh/dsdt.asl22
-rw-r--r--src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl2
-rw-r--r--src/mainboard/iwill/dk8_htx/dsdt.asl4
-rw-r--r--src/mainboard/kontron/kt690/dsdt.asl22
-rw-r--r--src/mainboard/technexion/tim5690/dsdt.asl22
-rw-r--r--src/mainboard/technexion/tim8690/dsdt.asl22
15 files changed, 108 insertions, 108 deletions
diff --git a/src/mainboard/amd/dbm690t/dsdt.asl b/src/mainboard/amd/dbm690t/dsdt.asl
index 70b553a5fa..bb235fc647 100644
--- a/src/mainboard/amd/dbm690t/dsdt.asl
+++ b/src/mainboard/amd/dbm690t/dsdt.asl
@@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/amd/mahogany/dsdt.asl b/src/mainboard/amd/mahogany/dsdt.asl
index bb24e42016..07d85149ff 100644
--- a/src/mainboard/amd/mahogany/dsdt.asl
+++ b/src/mainboard/amd/mahogany/dsdt.asl
@@ -1364,10 +1364,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1517,29 +1517,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/amd/mahogany_fam10/dsdt.asl b/src/mainboard/amd/mahogany_fam10/dsdt.asl
index dcd3618a99..04106dbc4d 100644
--- a/src/mainboard/amd/mahogany_fam10/dsdt.asl
+++ b/src/mainboard/amd/mahogany_fam10/dsdt.asl
@@ -1406,10 +1406,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1559,29 +1559,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/amd/pistachio/dsdt.asl b/src/mainboard/amd/pistachio/dsdt.asl
index 40ce24ba59..0053d10e79 100644
--- a/src/mainboard/amd/pistachio/dsdt.asl
+++ b/src/mainboard/amd/pistachio/dsdt.asl
@@ -1347,10 +1347,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1425,29 +1425,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
index 9e952c80bd..0f7efc9ee9 100644
--- a/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
+++ b/src/mainboard/amd/serengeti_cheetah/acpi/amd8111_isa.asl
@@ -124,7 +124,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
- Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
+ Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC
diff --git a/src/mainboard/amd/serengeti_cheetah/dsdt.asl b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
index a549d70297..a0f5c2283a 100644
--- a/src/mainboard/amd/serengeti_cheetah/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah/dsdt.asl
@@ -66,9 +66,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
- 0x00000000, // Address Range Maximum
+ 0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
- 0x00000000,,,
+ 0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl b/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl
index 1a91c901b7..f00069fc87 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi/amd8111_isa.asl
@@ -140,7 +140,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
- Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
+ Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
index 7676ddd576..aa2eeaa2b9 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl
@@ -82,9 +82,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-FAM10", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
- 0x00000000, // Address Range Maximum
+ 0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
- 0x00000000,,,
+ 0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF
diff --git a/src/mainboard/amd/tilapia_fam10/dsdt.asl b/src/mainboard/amd/tilapia_fam10/dsdt.asl
index 9f332463bb..b25ebdb00e 100644
--- a/src/mainboard/amd/tilapia_fam10/dsdt.asl
+++ b/src/mainboard/amd/tilapia_fam10/dsdt.asl
@@ -1406,10 +1406,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1559,29 +1559,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/asrock/939a785gmh/dsdt.asl b/src/mainboard/asrock/939a785gmh/dsdt.asl
index 761fb7217d..b5f2952d00 100644
--- a/src/mainboard/asrock/939a785gmh/dsdt.asl
+++ b/src/mainboard/asrock/939a785gmh/dsdt.asl
@@ -1364,10 +1364,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1517,29 +1517,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
index 9e952c80bd..0f7efc9ee9 100644
--- a/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
+++ b/src/mainboard/iwill/dk8_htx/acpi/amd8111_isa.asl
@@ -124,7 +124,7 @@
Name (BUF0, ResourceTemplate ()
{
Memory32Fixed (ReadWrite, 0x000E0000, 0x00020000) // BIOS E4000-FFFFF
- Memory32Fixed (ReadWrite, 0x000C0000, 0x00000000) // video BIOS c0000-c8404
+ Memory32Fixed (ReadWrite, 0x000C0000, 0x00010000) // video BIOS c0000-c8404
Memory32Fixed (ReadWrite, 0xFEC00000, 0x00001000) // I/O APIC
Memory32Fixed (ReadWrite, 0xFFC00000, 0x00380000) // LPC forwarded, 4 MB w/ROM
Memory32Fixed (ReadWrite, 0xFEE00000, 0x00001000) // Local APIC
diff --git a/src/mainboard/iwill/dk8_htx/dsdt.asl b/src/mainboard/iwill/dk8_htx/dsdt.asl
index a549d70297..a0f5c2283a 100644
--- a/src/mainboard/iwill/dk8_htx/dsdt.asl
+++ b/src/mainboard/iwill/dk8_htx/dsdt.asl
@@ -66,9 +66,9 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMD-K8", "AMDACPI", 100925440)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
0x00000000, // Address Space Granularity
0x000C0000, // Address Range Minimum
- 0x00000000, // Address Range Maximum
+ 0x000CFFFF, // Address Range Maximum
0x00000000, // Address Translation Offset
- 0x00000000,,,
+ 0x00010000,,,
, AddressRangeMemory, TypeStatic) //Video BIOS A0000h-C7FFFh
Memory32Fixed (ReadWrite, 0x000D8000, 0x00004000)//USB HC D8000-DBFFF
diff --git a/src/mainboard/kontron/kt690/dsdt.asl b/src/mainboard/kontron/kt690/dsdt.asl
index d69b0602e9..78f4620cc7 100644
--- a/src/mainboard/kontron/kt690/dsdt.asl
+++ b/src/mainboard/kontron/kt690/dsdt.asl
@@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/technexion/tim5690/dsdt.asl b/src/mainboard/technexion/tim5690/dsdt.asl
index 39ac7bdb83..2b0532d2e9 100644
--- a/src/mainboard/technexion/tim5690/dsdt.asl
+++ b/src/mainboard/technexion/tim5690/dsdt.asl
@@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
diff --git a/src/mainboard/technexion/tim8690/dsdt.asl b/src/mainboard/technexion/tim8690/dsdt.asl
index 05c61f0d8b..ad374b4074 100644
--- a/src/mainboard/technexion/tim8690/dsdt.asl
+++ b/src/mainboard/technexion/tim8690/dsdt.asl
@@ -1348,10 +1348,10 @@ DefinitionBlock (
Name(_CRS, ResourceTemplate() {
DMA(Compatibility,BusMaster,Transfer8){4}
IO(Decode16, 0x0000, 0x0000, 0x10, 0x10)
- IO(Decode16, 0x0081, 0x0081, 0x10, 0x03)
- IO(Decode16, 0x0087, 0x0087, 0x10, 0x01)
- IO(Decode16, 0x0089, 0x0089, 0x10, 0x03)
- IO(Decode16, 0x008F, 0x008F, 0x10, 0x01)
+ IO(Decode16, 0x0081, 0x0081, 0x01, 0x03)
+ IO(Decode16, 0x0087, 0x0087, 0x01, 0x01)
+ IO(Decode16, 0x0089, 0x0089, 0x01, 0x03)
+ IO(Decode16, 0x008F, 0x008F, 0x01, 0x01)
IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20)
}) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */
} /* End Device(_SB.PCI0.LpcIsaBr.MAD) */
@@ -1502,29 +1502,29 @@ DefinitionBlock (
0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PCBM
)
/* DRAM memory from 4GB to TopMem2 */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
- 0x00000000, /* Min */
+ 0x00000000, /* Granularity */
+ 0x00000000, /* Min */
0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
DMHI
)
/* BIOS space just below 16EB */
QWORDMemory(ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
- 0xFFFFFFFF, /* Granularity */
+ 0x00000000, /* Granularity */
0x00000000, /* Min */
- 0x00000000, /* Max */
+ 0x00000000, /* Max */
0x00000000, /* Translation */
- 0x00000000, /* Max-Min, RLEN */
+ 0x00000001, /* Max-Min, RLEN */
,,
PEBM
)
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-08 21:50:33 +0000