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authorBernardo Perez Priego <bernardo.perez.priego@intel.com>2021-09-22 16:55:09 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-10-20 15:48:22 +0000
commit24e3d67004cd59f1c6e5bbff9661ddfdab88727a (patch)
tree4b113a9c7ae4d149fede9b23f58c29dd0f72e387 /src
parent0a1602217fd0d60c59a497cb83a23b44cf4973d9 (diff)
mb/intel/adlrvp_m: Enable touchpad
These changes include ELAN touchpad to ACPI tables and configure GPIO's. BUG=None Test=Boot board, touchpad should be functional Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com> Change-Id: I78e5e133f7d3af47395819a79638a90fee4fd19e Reviewed-on: https://review.coreboot.org/c/coreboot/+/57863 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/devicetree_m.cb10
-rw-r--r--src/mainboard/intel/adlrvp/gpio_m.c8
2 files changed, 17 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index 1a8c641ae3..b73ded1e10 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -275,6 +275,16 @@ chip soc/intel/alderlake
register "hid_desc_reg_offset" = "0x01"
device i2c 0a on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""ELAN0000""
+ register "generic.desc" = ""ELAN Touchpad""
+ register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D11_IRQ)"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H1)"
+ register "generic.wake" = "GPE0_DW1_11"
+ register "generic.probed" = "1"
+ register "generic.has_power_resource" = "1"
+ device i2c 15 on end
+ end
end
device ref i2c1 on
chip drivers/intel/mipi_camera
diff --git a/src/mainboard/intel/adlrvp/gpio_m.c b/src/mainboard/intel/adlrvp/gpio_m.c
index 915b549e03..6eb670b7af 100644
--- a/src/mainboard/intel/adlrvp/gpio_m.c
+++ b/src/mainboard/intel/adlrvp/gpio_m.c
@@ -172,7 +172,13 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPI_APIC(GPP_E3, NONE, PLTRST, LEVEL, INVERT),
/* E4 : SATA_DEVSLP0 ==> USB4_BB_RT_FORCE_PWR */
- PAD_CFG_GPO(GPP_E4, 0, DEEP)
+ PAD_CFG_GPO(GPP_E4, 0, DEEP),
+
+ /* H1 : GPPC_H1_TCH_PAD_TCH_PNL2_LS_EN */
+ PAD_CFG_GPO(GPP_H1, 0, PLTRST),
+
+ /* D11 : TCH_PAD_INT_N */
+ PAD_CFG_GPI_APIC(GPP_D11, NONE, PLTRST, LEVEL, INVERT)
};
void variant_configure_gpio_pads(void)