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authorMario Scheithauer <mario.scheithauer@siemens.com>2022-11-24 14:32:32 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-01 14:05:56 +0000
commit23d224069ff2c9ca3224e833af290a31139e3434 (patch)
treef161b0ff675094812d7122904904daf969af66f1 /src
parentd672b5fdd84e4c127d75dd94bef9a50fbba40522 (diff)
mb/siemens/mc_ehl2: Disable GSPI2 controller
GSPI2 interface is not used on this mainboard and can be disabled. It will in addition remove the warning of a leftover static device in the log. Change-Id: I6e7462312953d50385ca7bb2f2e0abb8fc3a5886 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69972 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
index 74d0f26e42..c922e9e988 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb
@@ -142,8 +142,6 @@ chip soc/intel/elkhartlake
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
- device pci 12.0 on end # GSPI2
-
device pci 14.0 on end # USB3.1 xHCI
device pci 15.0 on end # I2C0