diff options
| author | Dinesh Gehlot <digehlot@google.com> | 2023-06-10 11:20:21 +0000 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-06-15 07:39:11 +0000 |
| commit | 225d9c1af44a89d6b5f39e0ca63479317feee98f (patch) | |
| tree | 4278f3b48cf1b3567659776487944b28b91eab77 /src | |
| parent | 3c06f1e522df23a8c91620af540f7f6b2698403c (diff) | |
soc/intel/cmd/blk/cse: Hook get CSE RW version into `.final`
This patch calls get CSE RW version function from .final hook if
the platform has required config (`SOC_INTEL_CSE_LITE_SKU`) selected.
BUG=b:280722061
TEST=Able to build and boot google/rex.
> cbmem -c | grep "CSE RW Firmware Version:"
[DEBUG] CSE RW Firmware Version: 18.0.0.1682
Signed-off-by: Dinesh Gehlot <digehlot@google.com>
Change-Id: Ifdb82c180b64fbb4575932427be54f544e1c98d4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75749
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/intel/common/block/cse/cse.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 990e10607b..ea956a70f1 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -1418,12 +1418,28 @@ void cse_late_finalize(void) cse_final_end_of_firmware(); } +static void intel_cse_get_rw_version(void) +{ + struct cse_fw_partition_info *version = cbmem_find(CBMEM_ID_CSE_PARTITION_VERSION); + if (version == NULL) + return; + + printk(BIOS_DEBUG, "CSE RW Firmware Version: %d.%d.%d.%d\n", + version->cur_cse_fw_version.major, + version->cur_cse_fw_version.minor, + version->cur_cse_fw_version.hotfix, + version->cur_cse_fw_version.build); +} + /* * `cse_final` function is native implementation of equivalent events performed by - * each FSP NotifyPhase() API invocations. + * each FSP NotifyPhase() API invocations. It also displays CSE firmware version + * if stored in CBMEM region. */ static void cse_final(struct device *dev) { + if (CONFIG(SOC_INTEL_CSE_LITE_SKU)) + intel_cse_get_rw_version(); /* * SoC user can have two options for sending EOP: * 1. Choose to send EOP late |