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authorFelix Singer <felixsinger@posteo.net>2023-11-12 18:34:28 +0000
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2023-11-13 21:31:41 +0000
commit1f7510f577ca4fd5b5b355261a256a5184027e67 (patch)
tree6e005b519f9a2e0f70f47956ab3dc6bd3f83ea55 /src
parent49dc2856d886c76744784de5f65beb24ebadda25 (diff)
mb/protectli/vault_kbl: Make use of the chipset devicetree
Use the references from the chipset devicetree as this makes the comments superfluous and remove devices which are turned off. Change-Id: Ie25c56f48648733095ab9d2a565c842b2f90efb2 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79041 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/protectli/vault_kbl/devicetree.cb65
1 files changed, 15 insertions, 50 deletions
diff --git a/src/mainboard/protectli/vault_kbl/devicetree.cb b/src/mainboard/protectli/vault_kbl/devicetree.cb
index 157bbbfae3..092115c335 100644
--- a/src/mainboard/protectli/vault_kbl/devicetree.cb
+++ b/src/mainboard/protectli/vault_kbl/devicetree.cb
@@ -191,53 +191,23 @@ chip soc/intel/skylake
device cpu_cluster 0 on end
device domain 0 on
- device pci 00.0 on end # Host Bridge
- device pci 02.0 on end # Integrated Graphics Device
- device pci 04.0 off end # SA thermal subsystem
- device pci 05.0 off end # SA IMGU
- device pci 08.0 off end # Gaussian Mixture Model
- device pci 13.0 off end # Integrated Sensor Hub
- device pci 14.0 on end # USB xHCI
- device pci 14.1 off end # USB xDCI (OTG)
- device pci 14.2 off end # Thermal Subsystem
- device pci 14.3 off end # Camera I/O Host Controller
- device pci 15.0 off end # I2C #0
- device pci 15.1 off end # I2C #1
- device pci 15.2 off end # I2C #2
- device pci 15.3 off end # I2C #3
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT Redirection
- device pci 16.4 off end # Management Engine Interface 3
- device pci 17.0 on end # SATA
- device pci 19.0 off end # UART #2
- device pci 19.1 off end # I2C #5
- device pci 19.2 off end # I2C #4
- device pci 1c.0 on end # PCI Express Port 1
- device pci 1c.1 on end # PCI Express Port 2
- device pci 1c.2 on end # PCI Express Port 3
- device pci 1c.3 on end # PCI Express Port 4
- device pci 1c.4 on end # PCI Express Port 5
- device pci 1c.5 on end # PCI Express Port 6
- device pci 1c.6 off end # PCI Express Port 7
- device pci 1c.7 off end # PCI Express Port 8
- device pci 1d.0 on # PCI Express Port 9 - WiFi
+ device ref igpu on end
+ device ref south_xhci on end
+ device ref heci1 on end
+ device ref sata on end
+ device ref pcie_rp1 on end
+ device ref pcie_rp2 on end
+ device ref pcie_rp3 on end
+ device ref pcie_rp4 on end
+ device ref pcie_rp5 on end
+ device ref pcie_rp6 on end
+ device ref pcie_rp9 on
+ # WIFI
smbios_slot_desc
"SlotTypePciExpressMini52pinWithoutBSKO"
"SlotLengthShort" "WIFI1" "SlotDataBusWidth1X"
end
- device pci 1d.1 off end # PCI Express Port 10
- device pci 1d.2 off end # PCI Express Port 11
- device pci 1d.3 off end # PCI Express Port 12
- device pci 1e.0 off end # UART #0
- device pci 1e.1 off end # UART #1
- device pci 1e.2 off end # GSPI #0
- device pci 1e.3 off end # GSPI #1
- device pci 1e.4 off end # eMMC
- device pci 1e.5 off end # SDIO
- device pci 1e.6 off end # SDCard
- device pci 1f.0 on
+ device ref lpc_espi on
chip superio/ite/it8772f
register "peci_tmpin" = "3"
register "tmpin1_mode" = "THERMAL_RESISTOR"
@@ -258,13 +228,8 @@ chip soc/intel/skylake
device pnp 2e.7 off end # GPIO
device pnp 2e.a off end # IR
end
- end # LPC Interface
- device pci 1f.1 on end # P2SB
- device pci 1f.2 on end # Power Management Controller
- device pci 1f.3 off end # Intel HDA
- device pci 1f.4 on end # SMBus
- device pci 1f.5 off end # PCH SPI
- device pci 1f.6 off end # GbE
+ end
+ device ref smbus on end
end
chip drivers/crb
device mmio 0xfed40000 on end