diff options
| author | Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> | 2022-03-22 11:22:02 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2022-03-22 05:04:50 +0000 |
| commit | 1f54599b9875e0de80c8636626bdfbe01646783c (patch) | |
| tree | 897b5e8b91c30dd0adfaa90106a80815d66e14da /src | |
| parent | 6e52c1da4a2245a7499530ea0943fa002ed8aa5e (diff) | |
mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
GL9763e doesn’t support L0s state, so disable L0s at the root port.
BUG=b:220079865
TEST=Build FW and run stress exceed 2500 cycles.
Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com>
Change-Id: I6ed790c833d1c01a30aed0fd09cac260a3837ead
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62973
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/taeko/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 75672ae362..b4cda82487 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -407,6 +407,7 @@ chip soc/intel/alderlake .clk_src = 0, .clk_req = 0, .flags = PCIE_RP_LTR | PCIE_RP_AER, + .pcie_rp_aspm = ASPM_L1, }" chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)" |