diff options
author | Raul E Rangel <rrangel@chromium.org> | 2021-10-08 13:10:38 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-21 17:36:09 +0000 |
commit | 1eae39f4cd9a8cbb574ad5f7fafc251930f18a3a (patch) | |
tree | 2438d019c2342a05af0a6d74f5b86b64649d8af4 /src | |
parent | 5a76c79791e4787702b22d1cc7edf534dbf664af (diff) |
arch/x86,cpu/x86: Fix 64-bit CPU_INFO_V2 build errors
There are two possible code sections where the cpu_info macros can be
included: .code32 and .code64
Doing a `push %eax` while in a .code64 section will result in a compiler
error. This macro manually pushes the 32-bit register onto the stack so
we can share the code between 32 and 64 bit builds.
We also can't implicitly dereference per_cpu_segment_selector because
it's a 32-bit address. Trying to do this results in the following:
E: Invalid reloc type: 11
E: Illegal use of 32bit sign extended addressing at offset 0x1b2
If we load the address first, then dereference it, we can work around
the limitation.
With these fixes, 64-bit builds can now use CPU_INFO_V2.
BUG=b:179699789
TEST=Boot qemu 64 bit build with CPU_INFO_V2 and 4 CPUs. See AP init
work as expected.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I4e72a808c9583bb2d0f697cbbd9cb9c0aa0ea2dc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58232
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/x86/c_start.S | 3 | ||||
-rw-r--r-- | src/cpu/x86/cpu_info.S.inc | 26 |
2 files changed, 25 insertions, 4 deletions
diff --git a/src/arch/x86/c_start.S b/src/arch/x86/c_start.S index 9e718fcab0..c3fdfd9f17 100644 --- a/src/arch/x86/c_start.S +++ b/src/arch/x86/c_start.S @@ -90,7 +90,8 @@ _start: */ set_segment_descriptor_base $per_cpu_segment_descriptors, %esp - mov per_cpu_segment_selector, %eax + mov $per_cpu_segment_selector, %eax + movl (%eax), %eax mov %eax, %gs #endif diff --git a/src/cpu/x86/cpu_info.S.inc b/src/cpu/x86/cpu_info.S.inc index 9ffdd84444..6dca920ba0 100644 --- a/src/cpu/x86/cpu_info.S.inc +++ b/src/cpu/x86/cpu_info.S.inc @@ -1,14 +1,34 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Pushes a 32-bit register onto the stack. + * + * There are two possible code sections where this code can be included: + * .code32 and .code64 + * + * Doing a `push %eax` while in a .code64 section will result in a compiler + * error. This macro manually pushes the 32-bit register onto the stack so we + * can share the code between 32 and 64 bit builds. + */ +.macro pushr reg:req +#if ENV_X86_64 + movl $0, -4(%esp) + movl \reg, -8(%esp) + sub $8, %esp +#else + push \reg +#endif +.endm + /* Push struct cpu_info */ .macro push_cpu_info index=$0 - push \index /* index */ - push $0 /* *cpu */ + pushr \index /* index (size_t) */ + pushr $0 /* *cpu */ .endm /* Push struct per_cpu_segment_data */ .macro push_per_cpu_segment_data cpu_info_pointer=%esp - push \cpu_info_pointer /* *cpu_info */ + pushr \cpu_info_pointer /* *cpu_info */ .endm /* |