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authorHarsha B R <harsha.b.r@intel.com>2023-03-23 16:14:08 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-06-21 13:30:45 +0000
commit1a2a9d70539bb9afc6edbe3ff369347455cdab77 (patch)
treed0883a97e356b82ba735739589243106a11e9dfa /src
parent3c53f5585139b27fcbe311965863864df2201b35 (diff)
mb/intel/adlrvp_rpl: Add initial code for adlrvp_rpl variant
This patch adds the initial code for adlrvp_rpl variant board which includes 1. Add overridetree.cb to corresponding variant directory 2. Update mainboard name in Kconfig and Kconfig.name 3. Add config option to select corresponding overridetree.cb BUG=b:286030718 BRANCH=firmware-brya-14505.B TEST=Able to build with the patch and boot the adlrvp_rpl platform to ChromeOS on Windows SKU. Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: Ifb95ff705189863d23894769ff450f9528e73b14 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73962 Reviewed-by: Usha P <usha.p@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig11
-rw-r--r--src/mainboard/intel/adlrvp/Kconfig.name3
-rw-r--r--src/mainboard/intel/adlrvp/variants/adlrvp_rpl/overridetree.cb4
3 files changed, 17 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 6a616e8719..425fe69dd2 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -33,6 +33,14 @@ config BOARD_INTEL_ADLRVP_P_EXT_EC
select GEN3_EXTERNAL_CLOCK_BUFFER
select DRIVERS_WWAN_FM350GL
+config BOARD_INTEL_ADLRVP_RPL
+ select BOARD_INTEL_ADLRVP_COMMON
+ select DRIVERS_UART_8250IO
+ select GEN3_EXTERNAL_CLOCK_BUFFER
+ select MAINBOARD_USES_IFD_EC_REGION
+ select SOC_INTEL_ALDERLAKE_PCH_P
+ select SOC_INTEL_RAPTORLAKE
+
config BOARD_INTEL_ADLRVP_RPL_EXT_EC
select SOC_INTEL_RAPTORLAKE
select BOARD_INTEL_ADLRVP_COMMON
@@ -112,6 +120,7 @@ config MAINBOARD_DIR
config VARIANT_DIR
default "adlrvp_p" if BOARD_INTEL_ADLRVP_P
default "adlrvp_p_ext_ec" if BOARD_INTEL_ADLRVP_P_EXT_EC
+ default "adlrvp_rpl" if BOARD_INTEL_ADLRVP_RPL
default "adlrvp_rpl_ext_ec" if BOARD_INTEL_ADLRVP_RPL_EXT_EC
default "adlrvp_p_mchp" if BOARD_INTEL_ADLRVP_P_MCHP
default "adlrvp_m" if BOARD_INTEL_ADLRVP_M
@@ -150,7 +159,7 @@ config DIMM_SPD_SIZE
choice
prompt "ON BOARD EC"
- default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_N
+ default ADL_INTEL_EC if BOARD_INTEL_ADLRVP_P || BOARD_INTEL_ADLRVP_M || BOARD_INTEL_ADLRVP_N || BOARD_INTEL_ADLRVP_RPL
default ADL_CHROME_EC if BOARD_INTEL_ADLRVP_P_EXT_EC || BOARD_INTEL_ADLRVP_M_EXT_EC || BOARD_INTEL_ADLRVP_P_MCHP || BOARD_INTEL_ADLRVP_N_EXT_EC || BOARD_INTEL_ADLRVP_RPL_EXT_EC
help
This option allows you to select the on board EC to use.
diff --git a/src/mainboard/intel/adlrvp/Kconfig.name b/src/mainboard/intel/adlrvp/Kconfig.name
index 69a893732f..0706e36b82 100644
--- a/src/mainboard/intel/adlrvp/Kconfig.name
+++ b/src/mainboard/intel/adlrvp/Kconfig.name
@@ -19,5 +19,8 @@ config BOARD_INTEL_ADLRVP_N
config BOARD_INTEL_ADLRVP_N_EXT_EC
bool "Alderlake-N RVP with Chrome EC"
+config BOARD_INTEL_ADLRVP_RPL
+ bool "Raptorlake silicon with Alderlake-P RVP"
+
config BOARD_INTEL_ADLRVP_RPL_EXT_EC
bool "Raptorlake silicon with Alderlake-P RVP and Chrome EC"
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_rpl/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl/overridetree.cb
new file mode 100644
index 0000000000..e58e9fbdce
--- /dev/null
+++ b/src/mainboard/intel/adlrvp/variants/adlrvp_rpl/overridetree.cb
@@ -0,0 +1,4 @@
+chip soc/intel/alderlake
+
+ device domain 0 on end
+end