diff options
author | Bora Guvendik <bora.guvendik@intel.com> | 2021-04-19 10:27:14 -0700 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-04-23 14:07:02 +0000 |
commit | 17160ffdb4ce3f96781c9d305e692a553e08eaf3 (patch) | |
tree | 0f8ccb08845fbdd645cbef09f56da3b63b6a85cc /src | |
parent | d3c490ef0db36e13447df40e39b4666b4c8d598c (diff) |
mb/intel/adlrvp_m: Enable bluetooth
Enable bluetooth on ADL-M RVPi. Remove 10.2 pci entry
since it is not used anymore.
BUG=none
TEST=Check lsusb to see if BT enumerated.
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: I39e77dbb619235129ed894d20f24956242de3aa9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/mainboard/intel/adlrvp/devicetree_m.cb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb index 1e618dd1d8..ec33ee147f 100644 --- a/src/mainboard/intel/adlrvp/devicetree_m.cb +++ b/src/mainboard/intel/adlrvp/devicetree_m.cb @@ -29,6 +29,9 @@ chip soc/intel/alderlake register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WWAN register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # M.2 WLAN + # Enable CNVi Bluetooth + register "CnviBtCore" = "true" + # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f register "gen1_dec" = "0x00fc0801" register "gen2_dec" = "0x000c0201" @@ -167,7 +170,6 @@ chip soc/intel/alderlake device pci 0e.0 off end # VMD device pci 10.0 off end device pci 10.1 off end - device pci 10.2 on end # CNVi: BT device pci 10.6 off end # THC0 device pci 10.7 off end # THC1 device pci 11.0 off end |