diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2023-10-07 09:00:12 +0200 |
---|---|---|
committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-10-28 22:06:01 +0000 |
commit | 125194f5fa872c9894197371cc6c693ff278e759 (patch) | |
tree | c9d37d567b59ad80db3712e842b99c4263f1ec9d /src | |
parent | 4a652eb92685ce751673858348b59286c63885dd (diff) |
lib/smbios: Improve Type9
Set characteristics 1 based on slot type and scan PCI capabilities
to update the characteristics 2 field in SMBIOS type 9 accordingly.
Change-Id: If96e0381b10c25cf73b3797a0f02a40dc933993e
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/lib/smbios.c | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/src/lib/smbios.c b/src/lib/smbios.c index 58caf8c6d8..9cee637b69 100644 --- a/src/lib/smbios.c +++ b/src/lib/smbios.c @@ -6,6 +6,7 @@ #include <console/console.h> #include <version.h> #include <device/device.h> +#include <device/pciexp.h> #include <device/dram/spd.h> #include <elog.h> #include <endian.h> @@ -1136,6 +1137,7 @@ static int smbios_generate_type9_from_devtree(struct device *dev, int *handle, enum slot_data_bus_bandwidth bandwidth; enum misc_slot_type type; enum misc_slot_length length; + uint8_t characteristics_1 = 0, characteristics_2 = 0; if (dev->path.type != DEVICE_PATH_PCI) return 0; @@ -1156,16 +1158,31 @@ static int smbios_generate_type9_from_devtree(struct device *dev, int *handle, else bandwidth = SlotDataBusWidthUnknown; - if (dev->smbios_slot_type) + if (dev->smbios_slot_type > SlotTypeUnknown) { type = dev->smbios_slot_type; - else + if ((type >= SlotTypePciExpress && type <= SlotTypeEDSFF_E3) || + (type >= SlotTypeAgp && type <= SlotTypeM2Socket3) || + (type == SlotTypePci)) { + characteristics_1 |= SMBIOS_SLOT_3P3V; + } + if ((type >= SlotTypeAgp && type <= SlotTypeAgp8X) || + (type == SlotTypePci)) + characteristics_1 |= SMBIOS_SLOT_5V; + } else { + characteristics_1 = SMBIOS_SLOT_UNKNOWN; type = SlotTypeUnknown; + } if (dev->smbios_slot_length) length = dev->smbios_slot_length; else length = SlotLengthUnknown; + if (pci_has_pme_pin(dev)) + characteristics_2 |= SMBIOS_SLOT_PME; + if (CONFIG(PCIEXP_PLUGIN_SUPPORT) && pciexp_dev_is_slot_hot_plug_cap(dev)) + characteristics_2 |= SMBIOS_SLOT_HOTPLUG; + return smbios_write_type9(current, handle, dev->smbios_slot_designation, type, @@ -1173,8 +1190,8 @@ static int smbios_generate_type9_from_devtree(struct device *dev, int *handle, usage, length, 0, - 1, - 0, + characteristics_1, + characteristics_2, dev->upstream->segment_group, dev->upstream->secondary, dev->path.pci.devfn); |