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authorRex-BC Chen <rex-bc.chen@mediatek.com>2022-07-25 19:08:06 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-08-02 12:20:52 +0000
commit125082091655feb99892f1af440f282213f3037f (patch)
tree1ce2789467e4e51501e5742dd402c2481fc9a7fd /src
parent4c24606637c2133f0e459ba324f847d5714b9e12 (diff)
mb/google/geralt: Enable Chrome EC
Initialize SPI bus 0 for Chrome EC control. TEST=build pass BUG=b:236331724 Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I6de5ea8a0273a3b0c725e4cdbcf69f4db74c5db7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66272 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/geralt/Kconfig9
-rw-r--r--src/mainboard/google/geralt/bootblock.c1
-rw-r--r--src/mainboard/google/geralt/chromeos.c6
-rw-r--r--src/mainboard/google/geralt/gpio.h12
-rw-r--r--src/mainboard/google/geralt/reset.c5
5 files changed, 26 insertions, 7 deletions
diff --git a/src/mainboard/google/geralt/Kconfig b/src/mainboard/google/geralt/Kconfig
index dde5b57511..0501a1d34f 100644
--- a/src/mainboard/google/geralt/Kconfig
+++ b/src/mainboard/google/geralt/Kconfig
@@ -8,17 +8,22 @@ if BOARD_GOOGLE_GERALT_COMMON
config VBOOT
select VBOOT_VBNV_FLASH
+ select EC_GOOGLE_CHROMEEC_SWITCHES
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_MEDIATEK_MT8188
select BOARD_ROMSIZE_KB_8192
select MAINBOARD_HAS_CHROMEOS
+ select CHROMEOS_USE_EC_WATCHDOG_FLAG if CHROMEOS
select COMMON_CBFS_SPI_WRAPPER
select SPI_FLASH
select SPI_FLASH_INCLUDE_ALL_DRIVERS
select COMMONLIB_STORAGE
select COMMONLIB_STORAGE_MMC
+ select EC_GOOGLE_CHROMEEC
+ select EC_GOOGLE_CHROMEEC_BOARDID
+ select EC_GOOGLE_CHROMEEC_SPI
config MAINBOARD_DIR
string
@@ -31,4 +36,8 @@ config MAINBOARD_PART_NUMBER
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 7
+
+config EC_GOOGLE_CHROMEEC_SPI_BUS
+ hex
+ default 0x0
endif
diff --git a/src/mainboard/google/geralt/bootblock.c b/src/mainboard/google/geralt/bootblock.c
index 88be0ffec1..ef7e5d1fbf 100644
--- a/src/mainboard/google/geralt/bootblock.c
+++ b/src/mainboard/google/geralt/bootblock.c
@@ -6,5 +6,6 @@
void bootblock_mainboard_init(void)
{
+ mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
mtk_snfc_init();
}
diff --git a/src/mainboard/google/geralt/chromeos.c b/src/mainboard/google/geralt/chromeos.c
index 94f5b4feef..434ff90659 100644
--- a/src/mainboard/google/geralt/chromeos.c
+++ b/src/mainboard/google/geralt/chromeos.c
@@ -7,9 +7,3 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
/* TODO: add Chrome specific gpios */
}
-
-int get_recovery_mode_switch(void)
-{
- /* TODO: use Chrome EC switches when EC support is added */
- return 0;
-}
diff --git a/src/mainboard/google/geralt/gpio.h b/src/mainboard/google/geralt/gpio.h
new file mode 100644
index 0000000000..386df4d1b3
--- /dev/null
+++ b/src/mainboard/google/geralt/gpio.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MAINBOARD_GOOGLE_GERALT_GPIO_H__
+#define __MAINBOARD_GOOGLE_GERALT_GPIO_H__
+
+#include <soc/gpio.h>
+
+#define GPIO_AP_EC_WARM_RST_REQ GPIO(DPI_HSYNC)
+
+void setup_chromeos_gpios(void);
+
+#endif
diff --git a/src/mainboard/google/geralt/reset.c b/src/mainboard/google/geralt/reset.c
index 3eb13907b8..05a576b69c 100644
--- a/src/mainboard/google/geralt/reset.c
+++ b/src/mainboard/google/geralt/reset.c
@@ -1,8 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <gpio.h>
#include <reset.h>
+#include "gpio.h"
+
void do_board_reset(void)
{
- /* TODO: add reset function when gpio is ready */
+ gpio_output(GPIO_AP_EC_WARM_RST_REQ, 1);
}