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authorJulius Werner <jwerner@chromium.org>2021-01-06 14:41:08 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-01-08 08:04:04 +0000
commit1153b2ef5c9eb7b12941e08389f1019e18f346e7 (patch)
treeacdf90846d240b678a0df53540aca152b301699b /src
parent7e06a9044a3da814ce3a3e99532d064170fd5521 (diff)
cbfstool: Use flock() when accessing CBFS files
Trying to do multiple operations on the same CBFS image at the same time likely leads to data corruption. For this reason, add BSD advisory file locking (flock()) to cbfstool (and ifittool which is using the same file I/O library), so that only one process will operate on the same file at the same time and the others will wait in line. This should help resolve parallel build issues with the INTERMEDIATE target on certain platforms. Unfortunately, some platforms use the INTERMEDIATE target to do a direct dd into the CBFS image. This should generally be discouraged and future platforms should aim to clearly deliminate regions that need to be written directly by platform scripts with custom FMAP sections, so that they can be written with `cbfstool write`. For the time being, update the legacy platforms that do this with explicit calls to the `flock` utility. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I022468f6957415ae68a7a7e70428ae6f82d23b06 Reviewed-on: https://review.coreboot.org/c/coreboot/+/49190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/ec/hp/kbc1126/Makefile.inc2
-rw-r--r--src/soc/amd/stoneyridge/Makefile.inc2
-rw-r--r--src/southbridge/amd/pi/hudson/Makefile.inc2
-rw-r--r--src/southbridge/intel/common/firmware/Makefile.inc2
4 files changed, 4 insertions, 4 deletions
diff --git a/src/ec/hp/kbc1126/Makefile.inc b/src/ec/hp/kbc1126/Makefile.inc
index 43e5d3fb0b..d767bad08f 100644
--- a/src/ec/hp/kbc1126/Makefile.inc
+++ b/src/ec/hp/kbc1126/Makefile.inc
@@ -22,7 +22,7 @@ ifeq ($(CONFIG_KBC1126_FIRMWARE),y)
printf " Building kbc1126_ec_insert.\n"
$(MAKE) -C util/kbc1126
printf " KBC1126 Inserting KBC1126 firmware blobs.\n"
- $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \
+ flock $< $(KBC1126_EC_INSERT) $(obj)/coreboot.pre \
$(CONFIG_KBC1126_FW1_OFFSET) $(CONFIG_KBC1126_FW2_OFFSET)
endif
diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc
index 969f5129eb..2ad07306b3 100644
--- a/src/soc/amd/stoneyridge/Makefile.inc
+++ b/src/soc/amd/stoneyridge/Makefile.inc
@@ -172,7 +172,7 @@ STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \
add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \
"$(STONEYRIDGE_FWM_ROM_POSITION)"
- dd if=$(obj)/amdfw.rom \
+ flock $< dd if=$(obj)/amdfw.rom \
of=$(obj)/coreboot.pre conv=notrunc bs=1 \
seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1
diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc
index 215a5a12bd..5eac024aa8 100644
--- a/src/southbridge/amd/pi/hudson/Makefile.inc
+++ b/src/southbridge/amd/pi/hudson/Makefile.inc
@@ -162,7 +162,7 @@ INTERMEDIATE+=add_amdfw
add_amdfw: $(obj)/coreboot.pre $(obj)/amdfw.rom
printf " DD Adding AMD Firmware\n"
- dd if=$(obj)/amdfw.rom \
+ flock $< dd if=$(obj)/amdfw.rom \
of=$(obj)/coreboot.pre conv=notrunc bs=1 seek=131072 >/dev/null 2>&1
else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc
index 516cd4d453..588c6633c0 100644
--- a/src/southbridge/intel/common/firmware/Makefile.inc
+++ b/src/southbridge/intel/common/firmware/Makefile.inc
@@ -35,7 +35,7 @@ add_intel_firmware: $(call strip_quotes,$(CONFIG_EC_BIN_PATH))
endif
add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL)
printf " DD Adding Intel Firmware Descriptor\n"
- dd if=$(IFD_BIN_PATH) \
+ flock $< dd if=$(IFD_BIN_PATH) \
of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1
ifeq ($(CONFIG_VALIDATE_INTEL_DESCRIPTOR),y)
$(objutil)/ifdtool/ifdtool \