diff options
| author | Fred Reitberger <reitbergerfred@gmail.com> | 2023-02-24 13:27:13 -0500 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2023-04-28 22:11:35 +0000 |
| commit | 097f5404607ea548cc49feb82bd99663c1ada0fe (patch) | |
| tree | 9de2df6956b5c0758c7baa10b91e8651e8388781 /src | |
| parent | 932cd22487e248306e43a5742176258eabdfc314 (diff) | |
soc/amd/phoenix: Populate type 0x63 entry with right MRC Cache
On boards with RECOVERY_MRC_CACHE FMAP section, populate type 0x63 BIOS
directory entry in RO with that section. If the RECOVERY_MRC_CACHE
section is not present, then fall back to RW_MRC_CACHE.
BUG=b:270569389
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: Ic5ac87685eaa5fec717e3efa4df7af511b4ce8aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/soc/amd/phoenix/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/phoenix/Makefile.inc | 16 |
2 files changed, 15 insertions, 2 deletions
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig index 48fd2a5811..6df8fe7771 100644 --- a/src/soc/amd/phoenix/Kconfig +++ b/src/soc/amd/phoenix/Kconfig @@ -8,6 +8,7 @@ config SOC_AMD_PHOENIX select ACPI_SOC_NVS select ARCH_X86 select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH + select CACHE_MRC_SETTINGS select DRIVERS_USB_ACPI select DRIVERS_USB_PCI_XHCI select FSP_COMPRESS_FSP_M_LZMA if !ASYNC_FILE_LOADING diff --git a/src/soc/amd/phoenix/Makefile.inc b/src/soc/amd/phoenix/Makefile.inc index a40aa2cbc8..09458307ac 100644 --- a/src/soc/amd/phoenix/Makefile.inc +++ b/src/soc/amd/phoenix/Makefile.inc @@ -135,6 +135,16 @@ PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | APOB_NV_SIZE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_SIZE" {print $$3}' $(obj)/fmap_config.h) APOB_NV_BASE=$(shell awk '$$2 == "FMAP_SECTION_RW_MRC_CACHE_START" {print $$3}' $(obj)/fmap_config.h) +ifeq ($(CONFIG_HAS_RECOVERY_MRC_CACHE),y) +# On boards with recovery MRC cache, point type 0x63 entry to RECOVERY_MRC_CACHE. +# Else use RW_MRC_CACHE. This entry will be added in the RO section. +APOB_NV_RO_SIZE=$(shell awk '$$2 == "FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE" {print $$3}' $(obj)/fmap_config.h) +APOB_NV_RO_BASE=$(shell awk '$$2 == "FMAP_SECTION_RECOVERY_MRC_CACHE_START" {print $$3}' $(obj)/fmap_config.h) +else +APOB_NV_RO_SIZE=$(APOB_NV_SIZE) +APOB_NV_RO_BASE=$(APOB_NV_BASE) +endif + ifeq ($(CONFIG_AMDFW_SPLIT),y) FMAP_AMDFW_BODY_LOCATION=$(shell awk '$$2 == "FMAP_SECTION_AMDFWBODY_START" {print $$3}' $(obj)/fmap_config.h) endif @@ -191,6 +201,8 @@ OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size) OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size) OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base) +OPT_APOB_NV_RO_SIZE=$(call add_opt_prefix, $(APOB_NV_RO_SIZE), --apob-nv-size) +OPT_APOB_NV_RO_BASE=$(call add_opt_prefix, $(APOB_NV_RO_BASE),--apob-nv-base) OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode) OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed) OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag) @@ -245,8 +257,8 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \ @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n" $(AMDFWTOOL) \ $(AMDFW_COMMON_ARGS) \ - $(OPT_APOB_NV_SIZE) \ - $(OPT_APOB_NV_BASE) \ + $(OPT_APOB_NV_RO_SIZE) \ + $(OPT_APOB_NV_RO_BASE) \ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ $(OPT_SPL_TABLE_FILE) \ |