diff options
| author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2022-04-18 10:53:14 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 12:27:09 +0000 |
| commit | 075f4e775136c3893ff65d7bc19e60828d8e7854 (patch) | |
| tree | 89b05a620ae66e90e5d671ff9d0548ae028edb67 /src | |
| parent | ea99f0dcea1b56f6eb6318c9fbf14883031460af (diff) | |
mb/google/brya/var/crota: modify DQ/ DQS table
BUG=b:229547171
BRANCH=none
TEST=pass memory training with error
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: If6acf8cb9474f816374743fd1e800da46958993d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63681
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/crota/memory.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/google/brya/variants/crota/memory.c b/src/mainboard/google/brya/variants/crota/memory.c index 659d214af0..7c6fc24307 100644 --- a/src/mainboard/google/brya/variants/crota/memory.c +++ b/src/mainboard/google/brya/variants/crota/memory.c @@ -18,36 +18,36 @@ static const struct mb_cfg baseboard_memcfg = { /* DQ byte map */ .lpx_dq_map = { .ddr0 = { - .dq0 = { 3, 2, 1, 0, 5, 4, 6, 7, }, - .dq1 = { 15, 14, 12, 13, 8, 9, 10, 11, }, + .dq0 = { 0, 3, 1, 2, 7, 6, 4, 5, }, + .dq1 = { 13, 12, 14, 15, 11, 8, 10, 9, }, }, .ddr1 = { - .dq0 = { 0, 2, 3, 1, 5, 7, 4, 6, }, - .dq1 = { 14, 13, 15, 12, 8, 9, 11, 10, }, + .dq0 = { 7, 6, 5, 4, 2, 1, 0, 3, }, + .dq1 = { 9, 8, 10, 11, 13, 14, 15, 12, }, }, .ddr2 = { - .dq0 = { 1, 2, 0, 3, 4, 6, 5, 7, }, - .dq1 = { 15, 13, 12, 14, 9, 10, 8, 11, }, + .dq0 = { 8, 11, 9, 10, 12, 14, 13, 15, }, + .dq1 = { 5, 7, 6, 4, 1, 2, 3, 0, }, }, .ddr3 = { - .dq0 = { 2, 1, 3, 0, 7, 4, 5, 6, }, - .dq1 = { 13, 12, 15, 14, 9, 11, 8, 10, }, + .dq0 = { 2, 0, 1, 3, 7, 6, 5, 4, }, + .dq1 = { 12, 13, 14, 15, 11, 8, 9, 10, }, }, .ddr4 = { - .dq0 = { 1, 2, 3, 0, 6, 4, 5, 7, }, - .dq1 = { 15, 13, 14, 12, 10, 9, 8, 11, }, + .dq0 = { 0, 3, 1, 2, 7, 5, 6, 4, }, + .dq1 = { 12, 14, 13, 15, 10, 8, 11, 9, }, }, .ddr5 = { - .dq0 = { 1, 0, 3, 2, 6, 7, 4, 5, }, - .dq1 = { 14, 12, 15, 13, 8, 9, 10, 11, }, + .dq0 = { 10, 8, 9, 11, 13, 15, 14, 12, }, + .dq1 = { 7, 6, 5, 4, 3, 1, 0, 2, }, }, .ddr6 = { - .dq0 = { 0, 2, 1, 3, 4, 7, 5, 6, }, - .dq1 = { 12, 13, 15, 14, 9, 11, 10, 8, }, + .dq0 = { 6, 4, 5, 7, 1, 0, 2, 3, }, + .dq1 = { 8, 9, 10, 11, 13, 15, 14, 12, }, }, .ddr7 = { - .dq0 = { 3, 2, 1, 0, 5, 4, 6, 7, }, - .dq1 = { 13, 15, 11, 12, 10, 9, 14, 8, }, + .dq0 = { 1, 2, 0, 3, 5, 6, 7, 4, }, + .dq1 = { 12, 13, 14, 15, 11, 8, 10, 9, }, }, }, @@ -55,10 +55,10 @@ static const struct mb_cfg baseboard_memcfg = { .lpx_dqs_map = { .ddr0 = { .dqs0 = 0, .dqs1 = 1 }, .ddr1 = { .dqs0 = 0, .dqs1 = 1 }, - .ddr2 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr2 = { .dqs0 = 1, .dqs1 = 0 }, .ddr3 = { .dqs0 = 0, .dqs1 = 1 }, .ddr4 = { .dqs0 = 0, .dqs1 = 1 }, - .ddr5 = { .dqs0 = 0, .dqs1 = 1 }, + .ddr5 = { .dqs0 = 1, .dqs1 = 0 }, .ddr6 = { .dqs0 = 0, .dqs1 = 1 }, .ddr7 = { .dqs0 = 0, .dqs1 = 1 } }, |