diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-10-02 20:19:07 +0200 |
|---|---|---|
| committer | Martin Roth <martin.roth@amd.corp-partner.google.com> | 2022-10-06 18:13:05 +0000 |
| commit | 072c99a0df1c5666a234b55701b78ccc8f498864 (patch) | |
| tree | 455739439919ca900c68f54ba1f4e70bb2103a91 /src | |
| parent | 89d9bf900fd5d3af251effa30dd2aa1889b78bb9 (diff) | |
nb/intel/i945/memmap.c: Clean up includes
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ie5d7d1dd446428d12a2f904545682e8fb9cd82f9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/northbridge/intel/i945/memmap.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index 58e29c8107..1fa0358dbd 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -3,17 +3,16 @@ // Use simple device model for this file even in ramstage #define __SIMPLE_DEVICE__ -#include <device/pci_ops.h> #include <arch/romstage.h> #include <cbmem.h> -#include "i945.h" #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> -#include <program_loading.h> -#include <cpu/intel/smm_reloc.h> +#include <device/pci_ops.h> #include <types.h> +#include "i945.h" + /* Decodes TSEG region size to bytes. */ u32 decode_tseg_size(const u8 esmramc) { |