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authorElyes Haouas <ehaouas@noos.fr>2024-05-14 15:28:04 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-05-28 03:21:37 +0000
commit0554fc10c0dea70366992e56f4d344b528364f3a (patch)
treefb8252c28ff2c43d9b2fa737588514dd97c02742 /src
parent1361beefb5cbd974f727c0123fe8a45a3b2f0266 (diff)
spd_bin.h: Use same macro for DDR3 and LPDDR3
DDR3 and LPDDR3 share the same PART_NUM and PART_LEN. So use the same macro. This is to prepare SPD de-duplication in following patch. Change-Id: Iea824a847b5072b1cbaa38dc38deae1d484d5b16 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82409 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/spd_bin.h9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/include/spd_bin.h b/src/include/spd_bin.h
index d0cdefcac1..c51e449559 100644
--- a/src/include/spd_bin.h
+++ b/src/include/spd_bin.h
@@ -3,6 +3,7 @@
#ifndef SPD_BIN_H
#define SPD_BIN_H
+#include <device/dram/ddr3.h>
#include <stdint.h>
#include <commonlib/region.h>
@@ -27,11 +28,11 @@
#define DDR3_BUS_DEV_WIDTH 8
#define DDR4_ORGANIZATION 12
#define DDR4_BUS_DEV_WIDTH 13
-#define DDR3_SPD_PART_OFF 128
-#define DDR3_SPD_PART_LEN 18
+#define DDR3_SPD_PART_OFF SPD_DDR3_PART_NUM
+#define DDR3_SPD_PART_LEN SPD_DDR3_PART_LEN
#define DDR3_SPD_SN_OFF 122
-#define LPDDR3_SPD_PART_OFF 128
-#define LPDDR3_SPD_PART_LEN 18
+#define LPDDR3_SPD_PART_OFF SPD_DDR3_PART_NUM
+#define LPDDR3_SPD_PART_LEN SPD_DDR3_PART_LEN
#define DDR4_SPD_PART_OFF 329
#define DDR4_SPD_PART_LEN 20
#define DDR4_SPD_SN_OFF 325