diff options
| author | Subrata Banik <subratabanik@google.com> | 2024-07-18 23:57:10 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-07-22 06:41:50 +0000 |
| commit | 039c7c8b018b5373450decaed6dbcbe3e15d313d (patch) | |
| tree | 941dae5badd61e7331f02ac772971aef144f7898 /src | |
| parent | e60989db3670d02a6d67bcaa76d00b00ef593f68 (diff) | |
mb/google/brya/var/trulo: Add CNVi descriptions
This patch adds descriptions for CNVi WiFi and BT device to the device
tree.
BUG=b:351976770
TEST=Builds successfully for google/trulo.
Change-Id: I7396917ca7875dcbe1d35a371cc450a9e070b18d
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mainboard/google/brya/variants/trulo/overridetree.cb | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/trulo/overridetree.cb b/src/mainboard/google/brya/variants/trulo/overridetree.cb index febc1ded58..d603c13782 100644 --- a/src/mainboard/google/brya/variants/trulo/overridetree.cb +++ b/src/mainboard/google/brya/variants/trulo/overridetree.cb @@ -8,6 +8,9 @@ chip soc/intel/alderlake # S0ix enable register "s0ix_enable" = "1" + # Enable CNVi BT + register "cnvi_bt_core" = "true" + register "usb2_ports[0]" = "USB2_PORT_MID(OC1)" # USB2_A0(MLB) register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # USB2_A1 (DB) register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera @@ -154,6 +157,14 @@ chip soc/intel/alderlake end end device ref shared_sram on end + device ref cnvi_wifi on + chip drivers/wifi/generic + register "wake" = "GPE0_PME_B0" + register "enable_cnvi_ddr_rfim" = "true" + register "add_acpi_dma_property" = "true" + device generic 0 on end + end + end device ref i2c0 on chip drivers/i2c/tpm register "hid" = ""GOOG0005"" |