diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-15 00:31:26 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-10-10 20:00:00 +0000 |
commit | 35a77428b2b3c24ac7e68b3961f866044dcea800 (patch) | |
tree | 18505ddf98d076b02e8dcb83bb3738d58063a99e /src | |
parent | 3b264d00745cfb1deca560ea6c491632dd79835f (diff) |
nb/intel/ironlake: Move register headers into a subfolder
Move all files with register definitions into a `registers` subfolder.
Subsequent commits will move the remaining registers into this folder.
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical.
Change-Id: I872269ca3c7fbbcffe83327a20bcf8d98b356beb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r-- | src/northbridge/intel/ironlake/ironlake.h | 2 | ||||
-rw-r--r-- | src/northbridge/intel/ironlake/registers/host_bridge.h (renamed from src/northbridge/intel/ironlake/hostbridge_regs.h) | 6 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h index 73f430ff48..93653c9658 100644 --- a/src/northbridge/intel/ironlake/ironlake.h +++ b/src/northbridge/intel/ironlake/ironlake.h @@ -43,7 +43,7 @@ /* Device 0:0.0 PCI configuration space (Host Bridge) */ -#include "hostbridge_regs.h" +#include "registers/host_bridge.h" /* * Generic Non-Core Registers diff --git a/src/northbridge/intel/ironlake/hostbridge_regs.h b/src/northbridge/intel/ironlake/registers/host_bridge.h index a681734c13..0322a515cc 100644 --- a/src/northbridge/intel/ironlake/hostbridge_regs.h +++ b/src/northbridge/intel/ironlake/registers/host_bridge.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef __IRONLAKE_HOSTBRIDGE_REGS_H__ -#define __IRONLAKE_HOSTBRIDGE_REGS_H__ +#ifndef __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ +#define __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ #define EPBAR 0x40 #define MCHBAR 0x48 @@ -28,4 +28,4 @@ #define CAPID0 0xe0 -#endif /* __IRONLAKE_HOSTBRIDGE_REGS_H__ */ +#endif /* __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ */ |