From 35a77428b2b3c24ac7e68b3961f866044dcea800 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Tue, 15 Sep 2020 00:31:26 +0200 Subject: nb/intel/ironlake: Move register headers into a subfolder Move all files with register definitions into a `registers` subfolder. Subsequent commits will move the remaining registers into this folder. Tested with BUILD_TIMELESS=1, Packard Bell MS2290 remains identical. Change-Id: I872269ca3c7fbbcffe83327a20bcf8d98b356beb Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45381 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/northbridge/intel/ironlake/hostbridge_regs.h | 31 ---------------------- src/northbridge/intel/ironlake/ironlake.h | 2 +- .../intel/ironlake/registers/host_bridge.h | 31 ++++++++++++++++++++++ 3 files changed, 32 insertions(+), 32 deletions(-) delete mode 100644 src/northbridge/intel/ironlake/hostbridge_regs.h create mode 100644 src/northbridge/intel/ironlake/registers/host_bridge.h (limited to 'src') diff --git a/src/northbridge/intel/ironlake/hostbridge_regs.h b/src/northbridge/intel/ironlake/hostbridge_regs.h deleted file mode 100644 index a681734c13..0000000000 --- a/src/northbridge/intel/ironlake/hostbridge_regs.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __IRONLAKE_HOSTBRIDGE_REGS_H__ -#define __IRONLAKE_HOSTBRIDGE_REGS_H__ - -#define EPBAR 0x40 -#define MCHBAR 0x48 -#define GGC 0x52 -#define DEVEN 0x54 -#define DEVEN_IGD (1 << 3) -#define DEVEN_PEG10 (1 << 1) -#define DEVEN_HOST (1 << 0) - -#define DMIBAR 0x68 - -#define LAC 0x87 /* Legacy Access Control */ - -#define REMAPBASE 0x98 -#define REMAPLIMIT 0x9a -#define TOM 0xa0 -#define TOUUD 0xa2 -#define IGD_BASE 0xa4 -#define GTT_BASE 0xa8 -#define TSEG 0xac /* TSEG base */ -#define TOLUD 0xb0 - -#define SKPD 0xdc /* Scratchpad Data */ - -#define CAPID0 0xe0 - -#endif /* __IRONLAKE_HOSTBRIDGE_REGS_H__ */ diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h index 73f430ff48..93653c9658 100644 --- a/src/northbridge/intel/ironlake/ironlake.h +++ b/src/northbridge/intel/ironlake/ironlake.h @@ -43,7 +43,7 @@ /* Device 0:0.0 PCI configuration space (Host Bridge) */ -#include "hostbridge_regs.h" +#include "registers/host_bridge.h" /* * Generic Non-Core Registers diff --git a/src/northbridge/intel/ironlake/registers/host_bridge.h b/src/northbridge/intel/ironlake/registers/host_bridge.h new file mode 100644 index 0000000000..0322a515cc --- /dev/null +++ b/src/northbridge/intel/ironlake/registers/host_bridge.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ +#define __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ + +#define EPBAR 0x40 +#define MCHBAR 0x48 +#define GGC 0x52 +#define DEVEN 0x54 +#define DEVEN_IGD (1 << 3) +#define DEVEN_PEG10 (1 << 1) +#define DEVEN_HOST (1 << 0) + +#define DMIBAR 0x68 + +#define LAC 0x87 /* Legacy Access Control */ + +#define REMAPBASE 0x98 +#define REMAPLIMIT 0x9a +#define TOM 0xa0 +#define TOUUD 0xa2 +#define IGD_BASE 0xa4 +#define GTT_BASE 0xa8 +#define TSEG 0xac /* TSEG base */ +#define TOLUD 0xb0 + +#define SKPD 0xdc /* Scratchpad Data */ + +#define CAPID0 0xe0 + +#endif /* __IRONLAKE_REGISTERS_HOST_BRIDGE_H__ */ -- cgit v1.2.3