ChromeOS: Refactor ACPI CNVS generation

Remove chromeos_dsdt_generator() calls under mainboard, it
is possible to make the single call to fill \CNVS and
\OIPG without leveraging device operations.

Change-Id: Id79af96bb6c038d273ac9c4afc723437fc1f3fc9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

6 files changed, 14 insertions, 16 deletions

diff --git a/src/vendorcode/google/chromeos/acpi.c b/src/vendorcode/google/chromeos/acpi.c
index 500e632858..5a54d70527 100644
--- a/src/vendorcode/google/chromeos/acpi.c
+++ b/src/vendorcode/google/chromeos/acpi.c
@@ -33,8 +33,3 @@ void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num)
 
 	acpigen_pop_len();
 }
-
-void chromeos_dsdt_generator(const struct device *dev)
-{
-	mainboard_chromeos_acpi_generate();
-}
diff --git a/src/vendorcode/google/chromeos/acpi/chromeos.asl b/src/vendorcode/google/chromeos/acpi/chromeos.asl
index 456f2d7cb3..b9f807fada 100644
--- a/src/vendorcode/google/chromeos/acpi/chromeos.asl
+++ b/src/vendorcode/google/chromeos/acpi/chromeos.asl
@@ -97,4 +97,6 @@ Device (CRHW)
 	}
 }
 
+#include <vendorcode/google/chromeos/acpi/gnvs.asl>
+
 #include "ramoops.asl"
diff --git a/src/vendorcode/google/chromeos/acpi/gnvs.asl b/src/vendorcode/google/chromeos/acpi/gnvs.asl
index 89e7055f89..7be45862b8 100644
--- a/src/vendorcode/google/chromeos/acpi/gnvs.asl
+++ b/src/vendorcode/google/chromeos/acpi/gnvs.asl
@@ -1,9 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 /* This is the ChromeOS specific ACPI information needed by
- * the mainboard's chromeos.asl
+ * chromeos.asl
  */
 
+External (CNVS, OpRegionObj)
+
 Field (CNVS, ByteAcc, NoLock, Preserve)
 {
 	VBT0,   32,	// 0x000 - Boot Reason
diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h
index 730a4bbcf9..abdd6c2a77 100644
--- a/src/vendorcode/google/chromeos/chromeos.h
+++ b/src/vendorcode/google/chromeos/chromeos.h
@@ -26,6 +26,7 @@ void cbmem_add_vpd_calibration_data(void);
 void chromeos_set_me_hash(u32*, int);
 void chromeos_set_ramoops(void *ram_oops, size_t size);
 void chromeos_set_ecfw_rw(void);
+void chromeos_init_chromeos_acpi(void);
 
 /**
  * get_dsm_calibration_from_key - Gets value related to DSM calibration from VPD
@@ -45,16 +46,9 @@ struct cros_gpio;
 void chromeos_acpi_gpio_generate(const struct cros_gpio *gpios, size_t num);
 
 /*
- * Common helper function and delcarations for mainboards to use to generate
- * ACPI-specific Chrome OS needs.
+ * Declaration for mainboards to use to generate ACPI-specific Chrome OS needs.
  */
 void mainboard_chromeos_acpi_generate(void);
-#if CONFIG(CHROMEOS)
-struct device;
-void chromeos_dsdt_generator(const struct device *dev);
-#else
-#define chromeos_dsdt_generator NULL
-#endif
 
 enum {
 	CROS_GPIO_REC = 1, /* Recovery */
diff --git a/src/vendorcode/google/chromeos/gnvs.c b/src/vendorcode/google/chromeos/gnvs.c
index 531463b273..7236662df7 100644
--- a/src/vendorcode/google/chromeos/gnvs.c
+++ b/src/vendorcode/google/chromeos/gnvs.c
@@ -98,7 +98,14 @@ void acpi_fill_cnvs(void)
 {
 	const struct opregion cnvs_op = OPREGION("CNVS", SYSTEMMEMORY, (uintptr_t)chromeos_acpi,
 						 sizeof(*chromeos_acpi));
+
+	if (!chromeos_acpi)
+		return;
+
 	acpigen_write_scope("\\");
 	acpigen_write_opregion(&cnvs_op);
 	acpigen_pop_len();
+
+	/* Usually this creates OIPG package for GPIOs. */
+	mainboard_chromeos_acpi_generate();
 }
diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chromeos/gnvs.h
index a25b2b0e24..a9f93d99cd 100644
--- a/src/vendorcode/google/chromeos/gnvs.h
+++ b/src/vendorcode/google/chromeos/gnvs.h
@@ -32,6 +32,4 @@ struct chromeos_acpi {
 	u8	pad[298];	// dd6-eff
 } __packed;
 
-void chromeos_init_chromeos_acpi(void);
-
 #endif