vendorcode/amd/pi: Clarify CAR disable

Clean up commentary on AMD_DISABLE_STACK to be clear that
it does a wbinvd to preserve coreboot CBMEM and
value of car_migrated.

Change-Id: I1265ed3d1bdf4b22f1a56f68bc53e18cfadc44b2
Signed-off-by: Marc Jones <marcj303@gmail.com>
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19269
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

4 files changed, 105 insertions, 17 deletions

diff --git a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
index 2707cab2bf..11376d50c7 100644
--- a/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00630F01/binaryPI/gcccar.inc
@@ -696,6 +696,13 @@ fam15_enable_stack_hook_exit:
 *   Return any family specific controls to their 'standard'
 *   settings for using cache with main memory.
 *
+* Note: Customized for coreboot:
+*   A wbinvd is used to send cache to memory.  The existing stack is preserved
+*   at its original location and additional information is preserved (e.g.
+*   coreboot CAR globals, heap structures, etc.). This implementation should
+*   NOT be used with S3 resume IF the stack/cache area is not reserved and
+*   over system memory.
+*
 * Inputs:
 *       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
 * Outputs:
@@ -903,7 +910,14 @@ fam15_disable_stack_remote_read_exit:
     _RDMSR
     btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
     _WRMSR
-    wbinvd                                # Clear the cache tag RAMs
+
+    #--------------------------------------------------------------------------
+    # Send cache to memory. Preserve stack and coreboot CAR globals.
+    # This shouldn't be used with S3 resume IF the stack/cache area is
+    # not reserved and over system memory.
+    #--------------------------------------------------------------------------
+    wbinvd
+
     #.if (bh == 01h) || (bh == 03h)      ; Is this TN or KV?
     cmp   $01, %bh
     jz    4f
@@ -1546,8 +1560,17 @@ ClearTheStack:                          # Stack base is in SS, stack pointer is
 .endm
 
 /*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
+* AMD_DISABLE_STACK:  Implementation is modified for coreboot from
+*                     the original AMD intent.  A WBINVD is used in the HOOK
+*                     to send dirty cache contents to DRAM backing before
+*                     disabling cache-as-ram.  This is not safe for S3 resume.
+*
+*                     todo:
+*                       * rework PI/AGESA source to set DRAM to UC to send
+*                         writes directly to memory
+*                       * move DCACHE_BASE or use postcar stage for teardown
+*                         to eliminate car_migrated problem that will occur
+*                         after wbinvd is changed back to invd
 *
 *   In:
 *       none
diff --git a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
index d6782a3d29..9badccfcd5 100644
--- a/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00660F01/binaryPI/gcccar.inc
@@ -401,6 +401,13 @@ fam15_enable_stack_hook_exit:
 *   Return any family specific controls to their 'standard'
 *   settings for using cache with main memory.
 *
+* Note: Customized for coreboot:
+*   A wbinvd is used to send cache to memory.  The existing stack is preserved
+*   at its original location and additional information is preserved (e.g.
+*   coreboot CAR globals, heap structures, etc.). This implementation should
+*   NOT be used with S3 resume IF the stack/cache area is not reserved and
+*   over system memory.
+*
 * Inputs:
 *       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
 * Outputs:
@@ -638,7 +645,14 @@ fam15_disable_stack_remote_read_exit:
     _RDMSR
     btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
     _WRMSR
-    wbinvd      #bao                          # Clear the cache tag RAMs
+
+    #--------------------------------------------------------------------------
+    # Send cache to memory. Preserve stack and coreboot CAR globals.
+    # This shouldn't be used with S3 resume IF the stack/cache area is
+    # not reserved and over system memory.
+    #--------------------------------------------------------------------------
+    wbinvd
+
 #    #.if (bh == 01h) || (bh == 03h)      ; Is this TN or KM?
 #    cmp   $01, %bh
 #    jz    4f
@@ -1285,8 +1299,17 @@ ClearTheStack:                          # Stack base is in SS, stack pointer is
 .endm
 
 /*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
+* AMD_DISABLE_STACK:  Implementation is modified for coreboot from
+*                     the original AMD intent.  A WBINVD is used in the HOOK
+*                     to send dirty cache contents to DRAM backing before
+*                     disabling cache-as-ram.  This is not safe for S3 resume.
+*
+*                     todo:
+*                       * rework PI/AGESA source to set DRAM to UC to send
+*                         writes directly to memory
+*                       * move DCACHE_BASE or use postcar stage for teardown
+*                         to eliminate car_migrated problem that will occur
+*                         after wbinvd is changed back to invd
 *
 *   In:
 *       none
diff --git a/src/vendorcode/amd/pi/00670F00/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00670F00/binaryPI/gcccar.inc
index d6782a3d29..1dd0724464 100644
--- a/src/vendorcode/amd/pi/00670F00/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00670F00/binaryPI/gcccar.inc
@@ -401,6 +401,16 @@ fam15_enable_stack_hook_exit:
 *   Return any family specific controls to their 'standard'
 *   settings for using cache with main memory.
 *
+* Note: Customized for coreboot:
+*   A wbinvd is used to send cache to memory.  The existing stack is preserved
+*   at its original location and additional information is preserved (e.g.
+*   coreboot CAR globals, heap structures, etc.). This implementation should
+*   NOT be used with S3 resume IF the stack/cache area is not reserved and
+*   over system memory.
+*
+*   This CPU resume path doesn't use CAR, but be careful if porting to
+*   other CPUs.
+*
 * Inputs:
 *       ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
 * Outputs:
@@ -634,11 +644,13 @@ fam15_disable_stack_remote_read_exit:
     # Begin critical sequence in which EAX, BX, ECX, and EDX must be preserved.
     #--------------------------------------------------------------------------
 
-    mov     $HWCR, %ecx                    # MSR:C001_0015h
-    _RDMSR
-    btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
-    _WRMSR
-    wbinvd      #bao                          # Clear the cache tag RAMs
+    #--------------------------------------------------------------------------
+    # Send cache to memory. Preserve stack and coreboot CAR globals.
+    # This shouldn't be used with S3 resume IF the stack/cache area is
+    # not reserved and over system memory.
+    #--------------------------------------------------------------------------
+    wbinvd
+
 #    #.if (bh == 01h) || (bh == 03h)      ; Is this TN or KM?
 #    cmp   $01, %bh
 #    jz    4f
@@ -1285,8 +1297,17 @@ ClearTheStack:                          # Stack base is in SS, stack pointer is
 .endm
 
 /*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
+* AMD_DISABLE_STACK:  Implementation is modified for coreboot from
+*                     the original AMD intent.  A WBINVD is used in the HOOK
+*                     to send dirty cache contents to DRAM backing before
+*                     disabling cache-as-ram.  This is not safe for S3 resume.
+*
+*                     todo:
+*                       * rework PI/AGESA source to set DRAM to UC to send
+*                         writes directly to memory
+*                       * move DCACHE_BASE or use postcar stage for teardown
+*                         to eliminate car_migrated problem that will occur
+*                         after wbinvd is changed back to invd
 *
 *   In:
 *       none
diff --git a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
index 2c51eb1fe8..1ad87c74f3 100644
--- a/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
+++ b/src/vendorcode/amd/pi/00730F01/binaryPI/gcccar.inc
@@ -383,6 +383,13 @@ fam16_enable_stack_hook_exit:
 ;   Return any family specific controls to their 'standard'
 ;   settings for using cache with main memory.
 ;
+; Note: Customized for coreboot:
+;   A wbinvd is used to send cache to memory.  The existing stack is preserved
+;   at its original location and additional information is preserved (e.g.
+;   coreboot CAR globals, heap structures, etc.). This implementation should
+;   NOT be used with S3 resume IF the stack/cache area is not reserved and
+;   over system memory.
+;
 ; Inputs:
 ;       ESI - [31:24] flags; [15:8]= Node#; [7:0]= core#
 ; Outputs:
@@ -602,8 +609,13 @@ fam16_disable_stack_remote_read_exit:
     _RDMSR
     btr     $INVD_WBINVD, %eax            # Disable INVD -> WBINVD conversion
     _WRMSR
-    wbinvd                                # Clear the cache tag RAMs
-    #invd
+
+    #--------------------------------------------------------------------------
+    # Send cache to memory. Preserve stack and coreboot CAR globals.
+    # This shouldn't be used with S3 resume IF the stack/cache area is
+    # not reserved and over system memory.
+    #--------------------------------------------------------------------------
+    wbinvd
 
     #Do Standard Family 16 work
     mov     $HWCR, %ecx                    # MSR:C001_0015h
@@ -1261,8 +1273,17 @@ ClearTheStack:                          # Stack base is in SS, stack pointer is
 .endm
 
 /*****************************************************************************
-* AMD_DISABLE_STACK:  Destroy the stack inside the cache. This routine
-*                     should only be executed on the BSP
+* AMD_DISABLE_STACK:  Implementation is modified for coreboot from
+*                     the original AMD intent.  A WBINVD is used in the HOOK
+*                     to send dirty cache contents to DRAM backing before
+*                     disabling cache-as-ram.  This is not safe for S3 resume.
+*
+*                     todo:
+*                       * rework PI/AGESA source to set DRAM to UC to send
+*                         writes directly to memory
+*                       * move DCACHE_BASE or use postcar stage for teardown
+*                         to eliminate car_migrated problem that will occur
+*                         after wbinvd is changed back to invd
 *
 *   In:
 *       none