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| author | Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com> | 2021-03-03 16:42:27 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-16 11:19:24 +0000 |
| commit | 7c7d0b108480be9eec5d2fd9b0f18e8ee1c343b9 (patch) | |
| tree | 2127b6205da0a2f1dd43177bba3c07996b710743 /src/vendorcode | |
| parent | ca2e7161d10e23d85184bc12c71e02e523528ccf (diff) | |
soc/mediatek/mt8192: adjust i2c "tLOW" and "tSU,STO"
The i2c actiming with the default reg setting cannot meet spec,
so we need to set some regs.
1. adjust the ratio of SCL high and low level, to adjust "tLOW".
2. modify ext_conf reg to adjust "tSU,STO".
BUG=b:179000159
TEST=Test on asurada (MT8192), boot pass,
timing pass.
Signed-off-by: Daolong Zhu <jg_daolongzhu@mediatek.corp-partner.google.com>
Change-Id: Ifbe97edbc38972af5b782fb93342ee0616127dd8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51024
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode')
0 files changed, 0 insertions, 0 deletions