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authorArthur Heymans <arthur@aheymans.xyz>2023-04-19 10:12:38 +0200
committerLean Sheng Tan <sheng.tan@9elements.com>2023-05-13 17:19:15 +0000
commita66b469107b10b3013fb1003c4821f0fb666c965 (patch)
treec21e4379f07671384c6a663ac682f5043ff68bad /src/vendorcode/mediatek
parent8d7eff32afb9b563eef03ec537f0568c2c3e411e (diff)
vendorcode/mediatek/mt8195: Make order of operators more explicit
Clang warns about this. Change-Id: I9a19f33df64a63e51e3dadac4aae28a8bb12121d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74551 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/vendorcode/mediatek')
-rw-r--r--src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c b/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
index 6634e48e67..14ea0b368d 100644
--- a/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
+++ b/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
@@ -116,7 +116,7 @@ static void lp4_dram_init_single_rank(DRAMC_CTX_T *p,LP4_DRAM_CONFIG_T *tr,U8 ra
LP4_MRS(p, 1, MR1 , rank);
LP4_MRS(p, 2, MR2 , rank);
- MR3 = ((!tr->DBI_WR & 1)<<7) | ((!tr->DBI_RD & 1)<<6) | (( PDDS & 7)<<3) | ((PPRP & 1)<<2) | ((tr->WR_PST & 1)<<1) | ((PU_CAL & 1)<<0);
+ MR3 = (((!tr->DBI_WR) & 1)<<7) | (((!tr->DBI_RD) & 1)<<6) | (( PDDS & 7)<<3) | ((PPRP & 1)<<2) | ((tr->WR_PST & 1)<<1) | ((PU_CAL & 1)<<0);
LP4_MRS(p, 3, MR3 , rank);
LP4_MRS(p, 11, MR11 , rank);
LP4_MRS(p, 12, MR12 , rank);