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authorRyan Chuang <ryan.chuang@mediatek.com>2021-05-06 23:48:18 +0800
committerHung-Te Lin <hungte@chromium.org>2021-05-14 04:00:38 +0000
commitb0b8dc374a4534bd0753adcfd88a5f2d42af0228 (patch)
treec20ebe77760adfaf963ec895a8e7356a941e465d /src/vendorcode/mediatek/mt8195/include/reg.h
parent156210a7184940a4ad6db81c37476e0ee53299ff (diff)
vendor/mediatek: Add MT8195 dram initialization code
This is the DRAM initialization code from the reference implementation released by Mediatek for MT8195. The DRAM calibration code can be taken as a standalone library, used by different boot loaders for initializing DRAM and following a different coding style (coreboot was using Linux Kernel coding style), so we have to put it in vendor code folder. Signed-off-by: Ryan Chuang <ryan.chuang@mediatek.com> Change-Id: Iada3ec5ae8a39a8e9253caba550c834d486dddcd Reviewed-on: https://review.coreboot.org/c/coreboot/+/54230 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/vendorcode/mediatek/mt8195/include/reg.h')
-rw-r--r--src/vendorcode/mediatek/mt8195/include/reg.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/vendorcode/mediatek/mt8195/include/reg.h b/src/vendorcode/mediatek/mt8195/include/reg.h
new file mode 100644
index 0000000000..9d3216e875
--- /dev/null
+++ b/src/vendorcode/mediatek/mt8195/include/reg.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+#ifndef REG_H
+#define REG_H
+
+#define REG32(addr) ((volatile uint32_t *)(uintptr_t)(addr))
+
+#define read32(addr) (*REG32(addr))
+#define write32(addr, val) (*REG32(addr) = (val))
+
+#endif