diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-07-09 17:44:18 -0700 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-23 08:46:14 +0000 |
| commit | b45ed65ef01278685abca80cd8f23c14e6e54581 (patch) | |
| tree | 41ba6ed8f48b245e91f9f2f405cbadc7cf2c4c50 /src/vendorcode/intel | |
| parent | b086728094d70b3455ddc66c513571e319516efe (diff) | |
soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fields
SystemMemoryMapHob is necessary for SMBIOS type 17 among other things.
It is a fairly large structure, so the pointer to the data instead of
the structure itself, is included in the HOB. Use pointer to
SystemMemoryMapHob structure to interpret SystemMemoryHob HOB body.
Adjust the structure definition to match with CPX-SP ww28 release.
Display more fields to ensure the structure definition is correct.
TEST=Boot DeltaLake server, and check field values of SystemMemoryMapHob
to make sure they are correct:
0x7590a090, 0x00000020 bytes: HOB_TYPE_GUID_EXTENSION
f8870015-6994-4b98-95a2bd56da91c07f: FSP_SYSTEM_MEMORYMAP_HOB_GUID
================== MEMORY MAP HOB DATA ==================
hob: 0x777f7000, structure size: 0x6c88
lowMemBase: 0x0, lowMemSize: 0x20, highMemBase: 0x40, highMemSize: 0x5d0
memSize: 0x600, memFreq: 0xb76
NumChPerMC: 3
SystemMemoryMapElement Entries: 2, entry size: 16
memory_map 0 BaseAddress: 0x0, ElementSize: 0x20, Type: 0x1
memory_map 1 BaseAddress: 0x40, ElementSize: 0x5d0, Type: 0x1
BiosFisVersion: 0x0
MmiohBase: 0x80000
0x777f7000: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
...
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I271bcbd6030276b8fcd99d5b4f2c93f034dd9b52
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43336
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h index df7787a330..71ff6d5e8b 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h @@ -40,6 +40,8 @@ are permitted provided that the following conditions are met: #define MEMTYPE_2LM_MASK (1 << 1) #define MEMTYPE_VOLATILE_MASK (MEMTYPE_1LM_MASK | MEMTYPE_2LM_MASK) +#define MAX_FPGA_REMOTE_SAD_RULES 2 // Maximum FPGA sockets exists on ICX platform + #define MAX_SAD_RULES 24 #define MAX_DRAM_CLUSTERS 1 #define MAX_IMC_PER_SOCKET 2 @@ -85,7 +87,7 @@ typedef struct SystemMemoryMapElement { /* NOTE - Reserved sizes need to be calibrated if any of the above #define values change */ typedef struct SystemMemoryMapHob { - UINT8 reserved1[58]; + UINT8 reserved1[61]; UINT32 lowMemBase; // Mem base in 64MB units for below 4GB mem. UINT32 lowMemSize; // Mem size in 64MB units for below 4GB mem. @@ -96,14 +98,19 @@ typedef struct SystemMemoryMapHob { UINT8 reserved2[61]; + UINT8 NumChPerMC; UINT8 numberEntries; // Number of Memory Map Elements - SYSTEM_MEMORY_MAP_ELEMENT Element[MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES]; + SYSTEM_MEMORY_MAP_ELEMENT Element[(MAX_SOCKET * MAX_DRAM_CLUSTERS * MAX_SAD_RULES) + MAX_FPGA_REMOTE_SAD_RULES]; + + UINT8 reserved3[24518]; + + UINT16 BiosFisVersion; // Firmware Interface Specification version currently supported by BIOS - UINT8 reserved3[24514]; + UINT8 reserved4[8]; UINT32 MmiohBase; // MMIOH base in 64MB granularity - UINT8 reserved4[2]; + UINT8 reserved5[2]; } SYSTEM_MEMORY_MAP_HOB; |