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| author | Ivy Jian <ivy_jian@compal.corp-partner.google.com> | 2021-06-10 19:27:07 +0800 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-06-14 05:16:31 +0000 |
| commit | 114d3ffe6f8a3367d2a7df0a32455c691f3b5338 (patch) | |
| tree | 987fc80980ab3726d2c5d86c259ad07fe6a6b6ed /src/vendorcode/intel | |
| parent | 7742aedb0fdc777d34a6d001c0c4564268e591c9 (diff) | |
mb/google/guybrush: Update memory configuration
Regenerate SPD for MT53E1G32D2NP-046 WT:B with correct value of ranks.
BUG=b:190692797
TEST=Build and boot to OS
Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: Icee095c7114f1d6dd960f2134db3816b367bf987
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/vendorcode/intel')
0 files changed, 0 insertions, 0 deletions