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authorJędrzej Ciupis <jciupis@google.com>2024-08-02 14:38:54 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-08-22 13:13:47 +0000
commit07dd73c9214b766762a89ffe51f27c77799293be (patch)
treefec99f9588327d4a6a0db2b400c75a6ea902d558 /src/vendorcode/intel/fsp
parent94a65fa2c6c8922ef9883cc45656a19f994975e5 (diff)
soc/intel/jasperlake: Add CrashLog implementation for Intel JSL
Extend support for CrashLog to Intel Jasperlake based platforms. This commit is based on 15cbc3b5996ae64aff2e4741c4c3ec3d7f5cc1a7, originally reviewed on https://review.coreboot.org/c/coreboot/+/49943. BUG=b:354834461 TEST=CrashLog can be enabled in Kconfig for Jasperlake based platforms and can generate a BERT table, if enabled. Change-Id: Ia18a79d8de849d556b4b8fd0e6b43090311eb23f Signed-off-by: Jędrzej Ciupis <jciupis@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <czapiga@google.com>
Diffstat (limited to 'src/vendorcode/intel/fsp')
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h
index 55f841835e..db7679e36c 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/jasperlake/FspmUpd.h
@@ -72,9 +72,11 @@ typedef struct {
**/
UINT8 EnableAbove4GBMmio;
-/** Offset 0x004B - Reserved
+/** Offset 0x004B - Enable/Disable CrashLog Device 10
+ Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
+ $EN_DIS
**/
- UINT8 Reserved0;
+ UINT8 CpuCrashLogDevice;
/** Offset 0x004C - Memory SPD Pointer Channel 0 Dimm 0
Pointer to SPD data, will be used only when SpdAddressTable SPD Address are marked as 00