diff options
| author | Ronak Kanabar <ronak.kanabar@intel.com> | 2022-03-03 12:53:52 +0530 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2022-03-07 20:13:48 +0000 |
| commit | 42c460d3e5bd83179bfcbdc29019b1a3d2e47e9a (patch) | |
| tree | 073538c565f9bde5b34c0043fe18362b83584a37 /src/vendorcode/intel/fsp/fsp2_0 | |
| parent | c0d7d6b564e979b29fab50203b53fdb4722920c9 (diff) | |
vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v3091_00
The headers added are generated as per FSP v3091_00
Previous FSP version was v2511_04
Changes include:
- Update MemInfoHob.h
BUG=b:222415800
BRANCH=None
Change-Id: I260544e0502174ab141fa31ac78ede803b4f161e
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0')
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h index 3722749734..73a8d29cfe 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/MemInfoHob.h @@ -4,7 +4,7 @@ data hobs. @copyright - Copyright (c) 1999 - 2021, Intel Corporation. All rights reserved.<BR> + Copyright (c) 1999 - 2022, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License that accompanies this distribution. The full text of the license may be found at @@ -18,6 +18,7 @@ #ifndef _MEM_INFO_HOB_H_ #define _MEM_INFO_HOB_H_ + #pragma pack (push, 1) extern EFI_GUID gSiMemoryS3DataGuid; @@ -256,7 +257,7 @@ typedef struct { SiMrcVersion Version; BOOLEAN EccSupport; UINT8 MemoryProfile; - UINT8 IsDMBRunning; ///< Memory Trained with Dynamic Memory Boost (DMB) + UINT8 IsDMBRunning; ///< Deprecated. UINT32 TotalPhysicalMemorySize; UINT32 DefaultXmptCK[MAX_XMP_PROFILE_NUM];///< Stores the tCK value read from SPD XMP profiles if they exist. /// @@ -278,6 +279,10 @@ typedef struct { UINT16 Ratio_UINT16; ///< DDR Frequency Ratio, used for programs that require ratios higher then 255 UINT32 NumPopulatedChannels; ///< Total number of memory channels populated HOB_SAGV_INFO SagvConfigInfo; ///< This data structure contains SAGV config values that are considered output by the MRC. + UINT16 TotalMemWidth; ///< Total Memory Width in bits from all populated channels + BOOLEAN MemorySpeedReducedWrongDimmSlot; ///< Can be used by OEM BIOS to display a warning on the screen that DDR speed was reduced due to wrong DIMM population + BOOLEAN MemorySpeedReducedMixedConfig; ///< Can be used by OEM BIOS to display a warning on the screen that DDR speed was reduced due to mixed DIMM config + BOOLEAN DynamicMemoryBoostTrainingFailed; ///< TRUE if Dynamic Memory Boost failed to train and was force disabled on the last full training boot. FALSE otherwise. } MEMORY_INFO_DATA_HOB; /** |