diff options
author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-09-22 15:42:08 -0700 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-10-12 15:33:26 +0000 |
commit | 249bb8df0aa7f218c58199281495fc6fcbb45a8f (patch) | |
tree | d39d11a1316046dadf0ca45ebde25b8062bd90ac /src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h | |
parent | 7a042229036c3dde2b443788389d6adfe1c1dd67 (diff) |
vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373
Update FSP headers for Tiger Lake platform generated based on FSP
version 3373. Previous version was 3333.
Changes include below UPDs:
ITbtPcieTunnelingForUsb4
SlowSlewRate
FastPkgCRampDisable
BUG=b:169759177
BRANCH=none
TEST=build and boot delbin/tglrvp
Cq-Depend:chrome-internal:3308203, chrome-internal:3308204
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I2e28905f8f7241940ea92ac3e83b52ff7948953a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45630
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Dossym Nurmukhanov <dossym@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h')
-rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h index 0b3fe7d64c..28592cd47c 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/tigerlake/FspmUpd.h @@ -2498,7 +2498,7 @@ typedef struct { /** Offset 0x091C - Reserved **/ - UINT8 Reserved45[4]; + UINT8 Reserved45[12]; } FSP_M_CONFIG; /** Fsp M UPD Configuration @@ -2517,11 +2517,11 @@ typedef struct { **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0920 +/** Offset 0x0928 **/ - UINT8 UnusedUpdSpace25[6]; + UINT8 UnusedUpdSpace27[6]; -/** Offset 0x0926 +/** Offset 0x092E **/ UINT16 UpdTerminator; } FSPM_UPD; |