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authorPeter Lemenkov <lemenkov@gmail.com>2018-12-07 11:23:21 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-01-17 14:52:33 +0000
commit7bbe3bb9f0caf518af89bc18b99cd9ac32ceff3f (patch)
tree4be81861c4f9187ef5b4ce0cc1cfd7daeea12dcd /src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
parentd5292bf9a5a1e47a3cbb6393f23c6f021232be02 (diff)
vendorcode/{amd,cavium,intel}: Remove trailing whitespace
find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \; Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/c/30959 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h')
-rw-r--r--src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
index 1bac0b8240..a625f00dbc 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cannonlake/FspmUpd.h
@@ -998,7 +998,7 @@ typedef struct {
/** Offset 0x020D - Processor Early Power On Configuration FCLK setting
<b>0: 800 MHz (ULT/ULX)</b>. <b>1: 1 GHz (DT/Halo)</b>. Not supported on ULT/ULX.-
2: 400 MHz. - 3: Reserved
- 0:800 MHz, 1: 1 GHz, 2: 400 MHz, 3: Reserved
+ 0:800 MHz, 1: 1 GHz, 2: 400 MHz, 3: Reserved
**/
UINT8 FClkFrequency;
@@ -2133,18 +2133,18 @@ typedef struct {
/** Offset 0x04F7 - TcritMax
Maximum Critical Temperature in Centigrade of the On-DIMM Thermal Sensor. TCRITMax
has to be greater than THIGHMax .\n
- Critical temperature will be TcritMax
+ Critical temperature will be TcritMax
**/
UINT8 TsodTcritMax;
-/** Offset 0x04F8 - Event mode
+/** Offset 0x04F8 - Event mode
Disable:Comparator mode.\n
Enable:Interrupt mode
$EN_DIS
**/
UINT8 TsodEventMode;
-/** Offset 0x04F9 - EVENT polarity
+/** Offset 0x04F9 - EVENT polarity
Disable:Active LOW.\n
Enable:Active HIGH
$EN_DIS
@@ -2609,7 +2609,7 @@ typedef struct {
/** Offset 0x059B - ChipsetInit HECI message
Enable/Disable. 0: Disable, 1: enable, Enable or disable ChipsetInit HECI message.
- If disabled, it prevents from sending ChipsetInit HECI message.
+ If disabled, it prevents from sending ChipsetInit HECI message.
$EN_DIS
**/
UINT8 ChipsetInitMessage;