vendorcode/intel: Add edk2-stable202005 support

This patch includes (edk2/edk2-stable202005) all required headers
for edk2-stable202005 quarterly EDK2 tag from EDK2 github project
using below command:
>> git clone https://github.com/tianocore/edk2.git vedk2-stable202005

Only include necessary header files.

MdePkg/Include/Base.h was updated to avoid compilation errors through
safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3172505d9b829647ee1208c87623172f10b39310
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 80 insertions, 0 deletions

diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/MmConfiguration.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/MmConfiguration.h
new file mode 100644
index 0000000000..bca9266213
--- /dev/null
+++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Protocol/MmConfiguration.h
@@ -0,0 +1,80 @@
+/** @file
+  EFI MM Configuration Protocol as defined in the PI 1.5 specification.
+
+  This protocol is used to:
+  1) report the portions of MMRAM regions which cannot be used for the MMRAM heap.
+  2) register the MM Foundation entry point with the processor code. The entry
+     point will be invoked by the MM processor entry code.
+
+  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _MM_CONFIGURATION_H_
+#define _MM_CONFIGURATION_H_
+
+#include <Pi/PiMmCis.h>
+
+#define EFI_MM_CONFIGURATION_PROTOCOL_GUID \
+  { \
+    0x26eeb3de, 0xb689, 0x492e, {0x80, 0xf0, 0xbe, 0x8b, 0xd7, 0xda, 0x4b, 0xa7 }  \
+  }
+
+///
+/// Structure describing a MMRAM region which cannot be used for the MMRAM heap.
+///
+typedef struct _EFI_MM_RESERVED_MMRAM_REGION {
+  ///
+  /// Starting address of the reserved MMRAM area, as it appears while MMRAM is open.
+  /// Ignored if MmramReservedSize is 0.
+  ///
+  EFI_PHYSICAL_ADDRESS    MmramReservedStart;
+  ///
+  /// Number of bytes occupied by the reserved MMRAM area. A size of zero indicates the
+  /// last MMRAM area.
+  ///
+  UINT64                  MmramReservedSize;
+} EFI_MM_RESERVED_MMRAM_REGION;
+
+typedef struct _EFI_MM_CONFIGURATION_PROTOCOL  EFI_MM_CONFIGURATION_PROTOCOL;
+
+/**
+  Register the MM Foundation entry point.
+
+  This function registers the MM Foundation entry point with the processor code. This entry point
+  will be invoked by the MM Processor entry code.
+
+  @param[in] This                The EFI_MM_CONFIGURATION_PROTOCOL instance.
+  @param[in] MmEntryPoint        MM Foundation entry point.
+
+  @retval EFI_SUCCESS            Success to register MM Entry Point.
+  @retval EFI_INVALID_PARAMETER  MmEntryPoint is NULL.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MM_REGISTER_MM_ENTRY)(
+  IN CONST EFI_MM_CONFIGURATION_PROTOCOL  *This,
+  IN EFI_MM_ENTRY_POINT                   MmEntryPoint
+  );
+
+///
+/// The EFI MM Configuration Protocol is a mandatory protocol published by a DXE CPU driver to
+/// indicate which areas within MMRAM are reserved for use by the CPU for any purpose,
+/// such as stack, save state or MM entry point.
+///
+/// The RegistermmEntry() function allows the MM IPL DXE driver to register the MM
+/// Foundation entry point with the MM entry vector code.
+///
+struct _EFI_MM_CONFIGURATION_PROTOCOL {
+  ///
+  /// A pointer to an array MMRAM ranges used by the initial MM entry code.
+  ///
+  EFI_MM_RESERVED_MMRAM_REGION  *MmramReservedRegions;
+  EFI_MM_REGISTER_MM_ENTRY      RegisterMmEntry;
+};
+
+extern EFI_GUID gEfiMmConfigurationProtocolGuid;
+
+#endif
+