vendorcode/intel: Add edk2-stable202005 support

This patch includes (edk2/edk2-stable202005) all required headers
for edk2-stable202005 quarterly EDK2 tag from EDK2 github project
using below command:
>> git clone https://github.com/tianocore/edk2.git vedk2-stable202005

Only include necessary header files.

MdePkg/Include/Base.h was updated to avoid compilation errors through
safeguarding definitions for MIN, MAX, NULL, ABS, ARRAY_SIZE.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3172505d9b829647ee1208c87623172f10b39310
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42239
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 79 insertions, 0 deletions

diff --git a/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/SecPlatformInformation2.h b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/SecPlatformInformation2.h
new file mode 100644
index 0000000000..a61ece7991
--- /dev/null
+++ b/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Ppi/SecPlatformInformation2.h
@@ -0,0 +1,79 @@
+/** @file
+  This file declares Sec Platform Information2 PPI.
+
+  This service is the primary handoff state into the PEI Foundation.
+  This service abstracts platform-specific information for many CPU's.
+
+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+  @par Revision Reference:
+  This PPI is introduced from PI Version 1.4.
+
+**/
+
+#ifndef __SEC_PLATFORM_INFORMATION2_PPI_H__
+#define __SEC_PLATFORM_INFORMATION2_PPI_H__
+
+#include <Ppi/SecPlatformInformation.h>
+
+#define EFI_SEC_PLATFORM_INFORMATION2_GUID \
+  { \
+    0x9e9f374b, 0x8f16, 0x4230, {0x98, 0x24, 0x58, 0x46, 0xee, 0x76, 0x6a, 0x97 } \
+  }
+
+typedef struct _EFI_SEC_PLATFORM_INFORMATION2_PPI EFI_SEC_PLATFORM_INFORMATION2_PPI;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_CPU.
+///
+typedef struct {
+  UINT32                               CpuLocation;
+  EFI_SEC_PLATFORM_INFORMATION_RECORD  InfoRecord;
+} EFI_SEC_PLATFORM_INFORMATION_CPU;
+
+///
+/// EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+///
+typedef struct {
+  ///
+  /// The CPU location would be the local APIC ID
+  ///
+  UINT32                               NumberOfCpus;
+  EFI_SEC_PLATFORM_INFORMATION_CPU     CpuInstance[1];
+} EFI_SEC_PLATFORM_INFORMATION_RECORD2;
+
+/**
+  This interface conveys state information out of the Security (SEC) phase into PEI.
+
+  This service is published by the SEC phase.
+
+  @param  PeiServices                The pointer to the PEI Services Table.
+  @param  StructureSize              The pointer to the variable describing size of the input buffer.
+  @param  PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.
+
+  @retval EFI_SUCCESS                The data was successfully returned.
+  @retval EFI_BUFFER_TOO_SMALL       The buffer was too small. The current buffer size needed to
+                                     hold the record is returned in StructureSize.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEC_PLATFORM_INFORMATION2)(
+  IN CONST  EFI_PEI_SERVICES                     **PeiServices,
+  IN OUT    UINT64                               *StructureSize,
+  OUT       EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2
+);
+
+///
+/// This service abstracts platform-specific information for many CPU's.
+/// It is the multi-processor equivalent of PlatformInformation for
+/// implementations that synchronize some, if not all CPU's in the SEC phase.
+///
+struct _EFI_SEC_PLATFORM_INFORMATION2_PPI {
+  EFI_SEC_PLATFORM_INFORMATION2  PlatformInformation2;
+};
+
+extern EFI_GUID gEfiSecPlatformInformation2PpiGuid;
+
+#endif