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author | Jakub Czapiga <jacz@semihalf.com> | 2023-06-01 12:25:08 +0000 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-06-14 08:12:12 +0000 |
commit | 4fe0b40e1b5d4602fdcea89ddbf2c90e91b39451 (patch) | |
tree | 5cf56bd960687c2fc82f189f555945b5e8912c4d /src/vendorcode/intel/Makefile.inc | |
parent | 07046ca217058d68e75049f9d278c6cbb99f73fc (diff) |
mb/google/rex/variants/ovis: Add USB and TCSS configuration
+-------------+----------------+------------+---------------------------------+
| PCH USB 2.0 | Connector Type | OC Mapping | Remarks |
+-------------+----------------+------------+---------------------------------+
| 1 | Type-C | OC_0 | Type C port - TCP1 |
| 2 | Type-C | OC_0 | Type C port - TCP0 |
| 3 | Type-C | OC_0 | Type C port - TCP2 |
| 4 | Type-A | OC_3 | USB3.2 Gen2x1 Type-A Port – TAP0|
| 7 | Type-A | OC_3 | TAP1 |
| 8 | Type-A | OC_3 | TAP2 |
| 9 | Type-A | OC_3 | TAP3 |
+-------------+----------------+------------+---------------------------------+
+---------------------+-------------------+------------+---------+
| PCH USB 3.1 Gen 2x1 | Connector Details | OC Mapping | Remarks |
+---------------------+-------------------+------------+---------+
| 1 | Type-A | OC_3 | TAP0 |
| 2 | Type-A | OC_3 | TAP1 |
+---------------------+-------------------+------------+---------+
+------+-------------------+------------+-----------------------------+
| TCPx | Connector Details | OC Mapping | Remarks |
+------+-------------------+------------+-----------------------------+
| 1 | Type C port 0 | OC_0 | To onboard Type-C connector |
| 2 | Type C port 1 | OC_0 | To onboard Type-C connector |
| 3 | Type C port 2 | OC_0 | To onboard Type-C connector |
+------+-------------------+------------+-----------------------------+
BUG=b:274421383
TEST=util/abuild/abuild -p none -t google/rex -x -a -b ovis
Change-Id: Icc81f12ec6cc4af37bcc1fcf3164cbfa5612a443
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75578
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/vendorcode/intel/Makefile.inc')
0 files changed, 0 insertions, 0 deletions