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authorFelix Held <felix-coreboot@felixheld.de>2024-01-30 15:33:34 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-01 11:38:38 +0000
commitfbda323e8af2b0556abb0c76beca4482c58af8a2 (patch)
treeebd8f82477c3f64d1655b9c76aa73fbf22ac11d5 /src/vendorcode/amd
parent30f36c35e75a1491edfc629766c146707dcb22f5 (diff)
vc/amd/opensil/genoa_poc/memmap: pass resource index as pointer
To make add_opensil_memmap match the other function that are directly or indirectly called by amd_pci_domain_read_resources, pass the resource index as a pointer instead of passing it by value and then returning the new resource index. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6a17e488a01cc52b2dab5dd3e3d58bdf3acb554d Reviewed-on: https://review.coreboot.org/c/coreboot/+/80269 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/vendorcode/amd')
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/memmap.c32
-rw-r--r--src/vendorcode/amd/opensil/genoa_poc/opensil.h2
2 files changed, 16 insertions, 18 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/memmap.c b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
index 8b54b5f567..1e633d9d7d 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/memmap.c
+++ b/src/vendorcode/amd/opensil/genoa_poc/memmap.c
@@ -84,11 +84,11 @@ static void print_memory_holes(void *unused)
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_ENTRY, print_memory_holes, NULL);
// This assumes holes are allocated
-unsigned long add_opensil_memmap(struct device *dev, unsigned long idx)
+void add_opensil_memmap(struct device *dev, unsigned long *idx)
{
- ram_from_to(dev, idx++, 0, 0xa0000);
- mmio_from_to(dev, idx++, 0xa0000, 0xc0000); // legacy VGA
- reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB); // Option ROM
+ ram_from_to(dev, (*idx)++, 0, 0xa0000);
+ mmio_from_to(dev, (*idx)++, 0xa0000, 0xc0000); // legacy VGA
+ reserved_ram_from_to(dev, (*idx)++, 0xc0000, 1 * MiB); // Option ROM
uint32_t mem_usable = (uintptr_t)cbmem_top();
uintptr_t early_reserved_dram_start, early_reserved_dram_end;
@@ -98,33 +98,33 @@ unsigned long add_opensil_memmap(struct device *dev, unsigned long idx)
early_reserved_dram_end = e->base + e->size;
// 1MB - bottom of DRAM reserved for early coreboot usage
- ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
+ ram_from_to(dev, (*idx)++, 1 * MiB, early_reserved_dram_start);
// DRAM reserved for early coreboot usage
- reserved_ram_from_to(dev, idx++, early_reserved_dram_start,
+ reserved_ram_from_to(dev, (*idx)++, early_reserved_dram_start,
early_reserved_dram_end);
// top of DRAM consumed early - low top usable RAM
// cbmem_top() accounts for low UMA and TSEG if they are used.
- ram_from_to(dev, idx++, early_reserved_dram_end,
+ ram_from_to(dev, (*idx)++, early_reserved_dram_end,
mem_usable);
// Account for UMA and TSEG
const uint32_t top_mem = ALIGN_DOWN(rdmsr(TOP_MEM).lo, 1 * MiB);
if (mem_usable != top_mem)
- reserved_ram_from_to(dev, idx++, mem_usable, top_mem);
+ reserved_ram_from_to(dev, (*idx)++, mem_usable, top_mem);
- mmconf_resource(dev, idx++);
+ mmconf_resource(dev, (*idx)++);
// Check if we're done
if (top_of_mem <= 0x100000000)
- return idx;
+ return;
// Holes in upper DRAM
// This assumes all the holes in upper DRAM are continuous
get_hole_info();
if (hole_info == NULL)
- return idx;
+ return;
uint64_t lowest_upper_hole_base = top_of_mem;
uint64_t highest_upper_hole_end = 0x100000000;
for (int hole = 0; hole < n_holes; hole++) {
@@ -135,16 +135,14 @@ unsigned long add_opensil_memmap(struct device *dev, unsigned long idx)
lowest_upper_hole_base = MIN(lowest_upper_hole_base, hole_info[hole].Base);
highest_upper_hole_end = MAX(highest_upper_hole_end, hole_info[hole].Base + hole_info[hole].Size);
if (hole_info[hole].Type == UMA)
- mmio_range(dev, idx++, hole_info[hole].Base, hole_info[hole].Size);
+ mmio_range(dev, (*idx)++, hole_info[hole].Base, hole_info[hole].Size);
else
- reserved_ram_range(dev, idx++, hole_info[hole].Base, hole_info[hole].Size);
+ reserved_ram_range(dev, (*idx)++, hole_info[hole].Base, hole_info[hole].Size);
}
- ram_from_to(dev, idx++, 0x100000000, lowest_upper_hole_base);
+ ram_from_to(dev, (*idx)++, 0x100000000, lowest_upper_hole_base);
// Do we need this?
if (top_of_mem > highest_upper_hole_end)
- ram_from_to(dev, idx++, highest_upper_hole_end, top_of_mem);
-
- return idx;
+ ram_from_to(dev, (*idx)++, highest_upper_hole_end, top_of_mem);
}
diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil.h b/src/vendorcode/amd/opensil/genoa_poc/opensil.h
index 77b3c4b692..e22552233b 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/opensil.h
+++ b/src/vendorcode/amd/opensil/genoa_poc/opensil.h
@@ -8,7 +8,7 @@
void SIL_STATUS_report(const char *function, const int status);
// Add the memory map to dev, starting at index idx, returns last use idx
-unsigned long add_opensil_memmap(struct device *dev, unsigned long idx);
+void add_opensil_memmap(struct device *dev, unsigned long *idx);
// Fill in FADT from openSIL
void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt);