vendorcode/amd: Hook up opensil

OpenSIL has a native buildsystem using meson and configuration mechanism
using kconfiglib.

To be able to use the coreboot toolchain with opensil, meson crossfiles
are used, which get generated by coreboot makefiles.

Configuration of opensil is done in a similar fashion with a template
defconfig after which kconfiglib is called to generate headers.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ide2d181914116119dfd37b1511d89ea965729141
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76511
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>

5 files changed, 218 insertions, 0 deletions

diff --git a/src/vendorcode/amd/opensil/Kconfig b/src/vendorcode/amd/opensil/Kconfig
new file mode 100644
index 0000000000..29c22b6da8
--- /dev/null
+++ b/src/vendorcode/amd/opensil/Kconfig
@@ -0,0 +1,17 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if SOC_AMD_OPENSIL
+
+config SOC_AMD_OPENSIL_GENOA
+	bool
+	help
+	  Select this on SoCs that use the Genoa version of opensil.
+
+config AMD_OPENSIL_PATH
+	string
+	default "$(top)/src/vendorcode/amd/opensil/genoa_poc/opensil" if SOC_AMD_OPENSIL_GENOA
+	help
+	  Set to the path of the openSIL directory containing meson.build.
+	  example
+
+endif
diff --git a/src/vendorcode/amd/opensil/Kconfig.debug b/src/vendorcode/amd/opensil/Kconfig.debug
new file mode 100644
index 0000000000..d49b37dc16
--- /dev/null
+++ b/src/vendorcode/amd/opensil/Kconfig.debug
@@ -0,0 +1,71 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if SOC_AMD_OPENSIL
+
+config OPENSIL_DEBUG_OUTPUT
+	bool "OpenSIL console output"
+	default y
+	help
+	  Select this if you want OpenSIL debug messages compiled
+	  in the image.
+
+if OPENSIL_DEBUG_OUTPUT
+
+config OPENSIL_DEBUG_PREFIX
+	bool "Print the opensil prefix"
+	default n
+	help
+	  This prints the function name and line level in front of the
+	  actual message.
+
+config OPENSIL_DEBUG_APOB
+	bool "Enable APOB messages"
+	default n
+	help
+	  Enable printing APOB related messages.
+
+config OPENSIL_DEBUG_NBIO
+	bool "Enable NBIO messages"
+	default y
+	help
+	  Enable printing NBIO related messages.
+
+config OPENSIL_DEBUG_CCX
+	bool "Enable CCX messages"
+	default y
+	help
+	  Enable printing CCX related messages.
+
+config OPENSIL_DEBUG_SMU
+	bool "Enable SMU messages"
+	default y
+	help
+	  Enable printing SMU related messages.
+
+config OPENSIL_DEBUG_DF
+	bool "Enable DF messages"
+	default y
+	help
+	  Enable printing DF related messages.
+
+config OPENSIL_DEBUG_MEM
+	bool "Enable MEM messages"
+	default y
+	help
+	  Enable printing MEM related messages.
+
+config OPENSIL_DEBUG_FCH
+	bool "Enable FCH messages"
+	default y
+	help
+	  Enable printing FCH related messages.
+
+config OPENSIL_DEBUG_RAS
+	bool "Enable RAS messages"
+	default y
+	help
+	  Enable printing RAS related messages.
+
+endif # OPENSIL_DEBUG_OUTPUT
+
+endif # SOC_AMD_OPENSIL
diff --git a/src/vendorcode/amd/opensil/Makefile.inc b/src/vendorcode/amd/opensil/Makefile.inc
new file mode 100644
index 0000000000..5afe075478
--- /dev/null
+++ b/src/vendorcode/amd/opensil/Makefile.inc
@@ -0,0 +1,91 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+ifeq ($(CONFIG_SOC_AMD_OPENSIL),y)
+
+ifneq ($(CONFIG_ARCH_RAMSTAGE_X86_32)$(CONFIG_ARCH_RAMSTAGE_X86_64),y)
+    $(error OpenSIL can only be built for either x86 or x86_64)
+endif
+
+opensil_dir := $(call strip_quotes,$(CONFIG_AMD_OPENSIL_PATH))
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
+cpu_family_string="x86"
+cpu_string="i686"
+opensil_target_name=AMDopensil32
+is_32bit="true"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+clang_args=\'-m32\'\, \'-fno-pic\'\,
+endif
+endif
+
+ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_64),y)
+cpu_family_string="x86_64"
+cpu_string="x86_64"
+opensil_target_name=AMDopensil64
+is_32bit="false"
+ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
+clang_args=\'-fno-pic\'\,
+endif
+endif
+
+ifeq ($(CONFIG_OPENSIL_DEBUG_OUTPUT),y)
+sil_debug_enable="true"
+else
+sil_debug_enable="false"
+endif
+
+# check if $(obj) is an absolute or a relative path
+ifeq ($(shell printf %.1s "$(obj)"),/)
+OBJPATH = $(obj)
+else
+OBJPATH = $(top)/$(obj)
+endif
+
+PYTHON?=python
+
+OPENSIL_CONFIG=opensil_config
+
+bios_base=$(shell printf "%x" $(call int-subtract, $(CONFIG_ROMSTAGE_ADDR) $(CONFIG_C_ENV_BOOTBLOCK_SIZE)))
+bios_size=$(CONFIG_C_ENV_BOOTBLOCK_SIZE)
+
+$(OBJPATH)/$(OPENSIL_CONFIG): $(opensil_dir)/../opensil_config.template
+	sed -e "s,##APOB_BASE##,$(CONFIG_PSP_APOB_DRAM_ADDRESS)," \
+	    -e "s,##BIOS_ENTRY_BASE##,$(bios_base)," \
+	    -e "s,##BIOS_ENTRY_SIZE##,$(bios_size) ," \
+		$< > $@
+
+$(OBJPATH)/$(OPENSIL_CONFIG).h: $(OBJPATH)/$(OPENSIL_CONFIG) $(obj)/config.h $(objutil)/kconfig/conf
+	cd $(opensil_dir); KCONFIG_CONFIG=$(OBJPATH)/$(OPENSIL_CONFIG) KCONFIG_AUTOHEADER=$@ $(PYTHON) util/kconfig/lib/genconfig.py Kconfig
+
+# meson handles ccache on its own
+OPENSIL_COMPILER=$(filter-out $(CCACHE), $(CC_ramstage))
+
+$(OBJPATH)/meson_crosscompile: $(opensil_dir)/../meson_cross.template  $(obj)/config.h $(OBJPATH)/$(OPENSIL_CONFIG).h
+	sed -e "s,##COMPILER##,$(OPENSIL_COMPILER)," \
+	    -e "s,##AR##,$(AR_ramstage)," \
+	    -e "s,##NASM##,$(NASM)," \
+	    -e "s,##COREBOOT_DIR##,$(top)," \
+	    -e "s,##OPENSIL_DIR##,$(opensil_dir)," \
+	    -e "s,##OBJPATH##,$(OBJPATH)," \
+	    -e "s,##CPU_FAMILY##,$(cpu_family_string)," \
+	    -e "s,##CPU##,$(cpu_string)," \
+	    -e "s,##IS32BIT##,$(is_32bit)," \
+	    -e "s,##SIL_DEBUG_ENABLE##,$(sil_debug_enable)," \
+	    -e "s,##CLANG_ARGS##,$(clang_args)," \
+		$< > $@
+
+# Don't set a meson buildtype as opensil is broken when compiler optimizations are enabled
+$(OBJPATH)/opensil:  $(OBJPATH)/meson_crosscompile $(obj)/config.h
+	cd $(opensil_dir); meson setup --cross-file $< $(OBJPATH)/opensil -Db_staticpic=false \
+		-DPlatKcfgDir=$(OBJPATH) -DPlatKcfg=$(OPENSIL_CONFIG)
+
+$(OBJPATH)/opensil/lib$(opensil_target_name).a: $(OBJPATH)/opensil
+	meson compile -C $(OBJPATH)/opensil $(opensil_target_name)
+
+$(OBJPATH)/opensil.a: $(OBJPATH)/opensil/lib$(opensil_target_name).a
+	cp $(OBJPATH)/opensil/lib$(opensil_target_name).a $@
+
+romstage-libs += $(OBJPATH)/opensil.a
+ramstage-libs += $(OBJPATH)/opensil.a
+
+endif
diff --git a/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template b/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template
new file mode 100644
index 0000000000..b457c802ab
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/meson_cross.template
@@ -0,0 +1,34 @@
+[binaries]
+c = '##COMPILER##'
+ar = '##AR##'
+nasm = '##NASM##'
+
+[built-in options]
+c_args = ['-nostdinc',
+          '-I##OBJPATH##',
+          '-I##COREBOOT_DIR##/src/include',
+          '-I##COREBOOT_DIR##/src/arch/x86/include',
+          '-I##COREBOOT_DIR##/src/commonlib/include',
+          '-I##COREBOOT_DIR##/src/commonlib/bsd/include',
+          '-include', '##COREBOOT_DIR##/src/include/kconfig.h',
+          '-include', '##OBJPATH##/config.h',
+          '-include', '##COREBOOT_DIR##/src/commonlib/bsd/include/commonlib/bsd/compiler.h',
+          '-DHAS_STRING_H=1',
+          # openSIL isn't compatible with coreboot's assert implementation, so use special case
+          '-D_PORTING_H_=1',
+          '-DSIL_DEBUG_ENABLE=##SIL_DEBUG_ENABLE##',
+          # openSIL uses coreboot assert which uses printk which warns about unused-param
+          '-Wno-unused-parameter',
+          # ubiquitous problem in openSIL
+          '-Wno-missing-field-initializers',
+          ##CLANG_ARGS##
+         ]
+
+[host_machine]
+system = 'linux'
+cpu_family = '##CPU_FAMILY##'
+cpu = '##CPU##'
+endian = 'little'
+
+[properties]
+is32bit = ##IS32BIT##
diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil_config.template b/src/vendorcode/amd/opensil/genoa_poc/opensil_config.template
new file mode 100644
index 0000000000..2ddd3b4ec1
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/opensil_config.template
@@ -0,0 +1,5 @@
+CONFIG_PLAT_APOB_ADDRESS=##APOB_BASE##
+CONFIG_PSP_BIOS_BIN_BASE=##BIOS_ENTRY_BASE##
+CONFIG_PSP_BIOS_BIN_SIZE=##BIOS_ENTRY_SIZE##
+CONFIG_PLAT_NUMBER_SOCKETS=1
+CONFIG_SOC_F19M10=y