diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-13 23:09:48 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-15 09:31:36 +0000 |
| commit | c7be0781ce0849a54ee75ffb30dd3c0a3716cca3 (patch) | |
| tree | f0993def20177efc21bfeb685dd5ae905ff566db /src/vendorcode/amd/opensil/genoa_poc | |
| parent | b15494900479bf2d4260c8b6696ece6bcc631102 (diff) | |
vc/amd: use 'openSIL' spelling in comments & help text
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I176182180f508a180726fca60064b16fad80e9d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Diffstat (limited to 'src/vendorcode/amd/opensil/genoa_poc')
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/filter.h | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/opensil.h | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/ramstage.c | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/filter.h b/src/vendorcode/amd/opensil/genoa_poc/filter.h index b4a94a697f..f0817f7502 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/filter.h +++ b/src/vendorcode/amd/opensil/genoa_poc/filter.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* Keep this in sync with opensil SilCommon.h file */ +/* Keep this in sync with openSIL SilCommon.h file */ #define DEBUG_FILTER_APOB 0x00000001UL #define DEBUG_FILTER_NBIO 0x00000002UL #define DEBUG_FILTER_CCX 0x00000004UL diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil.h b/src/vendorcode/amd/opensil/genoa_poc/opensil.h index ef198869e6..b9caf73279 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/opensil.h +++ b/src/vendorcode/amd/opensil/genoa_poc/opensil.h @@ -8,7 +8,7 @@ void SIL_STATUS_report(const char *function, const int status); // Add the memory map to dev, starting at index idx, returns last use idx int add_opensil_memmap(struct device *dev, int idx); -// Fill in FADT from opensil +// Fill in FADT from openSIL void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt); #endif diff --git a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c index ab551999d8..bee84957c6 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c +++ b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c @@ -146,17 +146,17 @@ static void opensil_entry(void *timepoint) ret = InitializeSiTp3(); break; default: - printk(BIOS_ERR, "Unknown opensil timepoint\n"); + printk(BIOS_ERR, "Unknown openSIL timepoint\n"); return; } char opensil_function[16]; snprintf(opensil_function, sizeof(opensil_function), "InitializeSiTp%d", tp); SIL_STATUS_report(opensil_function, ret); if (ret == SilResetRequestColdImm || ret == SilResetRequestColdDef) { - printk(BIOS_INFO, "openSil requested a cold reset"); + printk(BIOS_INFO, "openSIL requested a cold reset"); do_cold_reset(); } else if (ret == SilResetRequestWarmImm || ret == SilResetRequestWarmDef) { - printk(BIOS_INFO, "openSil requested a warm reset"); + printk(BIOS_INFO, "openSIL requested a warm reset"); do_warm_reset(); } } |