diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-12 16:32:47 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-14 13:03:17 +0000 |
| commit | 3d3e1cf060ccf5701e2ccb0a1698fa804badef90 (patch) | |
| tree | 3870720dc5c7ac9f92f0567563f2e203050df7bb /src/vendorcode/amd/opensil/genoa_poc | |
| parent | 27f888cda1bb1ecf4a424b6cb6d4e45de6381401 (diff) | |
vendorcode/amd/opensil/genoa_poc: add opensil_fill_fadt_io_ports
Add the opensil_fill_fadt_io_ports function to fill in the ACPI I/O
ports in FADT that openSIL configured.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I154a162cc8e048cadab693c0755e96c71a62983c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76529
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/opensil/genoa_poc')
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/acpi.c | 18 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/opensil.h | 2 |
3 files changed, 20 insertions, 1 deletions
diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc index b09299b976..70bf44b32d 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc +++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc @@ -8,6 +8,7 @@ CPPFLAGS_romstage += -I$(opensil_dir)/Include -I$(opensil_dir)/xUSL -I$(opensil_ romstage-y += opensil_console.c romstage-y += romstage.c +ramstage-y += acpi.c ramstage-y += memmap.c ramstage-y += opensil_console.c ramstage-y += ramstage.c diff --git a/src/vendorcode/amd/opensil/genoa_poc/acpi.c b/src/vendorcode/amd/opensil/genoa_poc/acpi.c new file mode 100644 index 0000000000..a0af4a3f3e --- /dev/null +++ b/src/vendorcode/amd/opensil/genoa_poc/acpi.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <Sil-api.h> +#include <SilCommon.h> +#include <xSIM-api.h> +#include <FCH/Common/FchCommonCfg.h> +#include "opensil.h" + +void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt) +{ + FCHHWACPI_INPUT_BLK *blk = SilFindStructure(SilId_FchHwAcpiP, 0); + + fadt->pm1a_evt_blk = blk->AcpiPm1EvtBlkAddr; + fadt->pm1a_cnt_blk = blk->AcpiPm1CntBlkAddr; + fadt->pm_tmr_blk = blk->AcpiPmTmrBlkAddr; + fadt->gpe0_blk = blk->AcpiGpe0BlkAddr; +} diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil.h b/src/vendorcode/amd/opensil/genoa_poc/opensil.h index ecde809ca7..ef198869e6 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/opensil.h +++ b/src/vendorcode/amd/opensil/genoa_poc/opensil.h @@ -9,6 +9,6 @@ void SIL_STATUS_report(const char *function, const int status); // Add the memory map to dev, starting at index idx, returns last use idx int add_opensil_memmap(struct device *dev, int idx); // Fill in FADT from opensil -void opensil_fill_fadt(acpi_fadt_t *fadt); +void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt); #endif |