diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-06-26 16:48:32 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-14 21:57:34 +0000 |
| commit | 5d65c819a9ea7b4b2179b85e56b1e548aee53d69 (patch) | |
| tree | 001161669bfea7bee5a867bfbc9812f850bed843 /src/vendorcode/amd/fsp/phoenix/FspmUpd.h | |
| parent | c987d7b7d31770962ba0437c4144568e2b98b91c (diff) | |
vc/amd/fsp/phoenix/FspmUpd: drop eMMC-related UPDs
Phoenix doesn't have an eMMC controller and those UPDs were carried over
from Picasso. The SoC's fsp_m_params.c didn't write to any of those
fields, so this doesn't change any behavior.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie3640c1493a92c1effba3ce42103d022bd8399ff
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Diffstat (limited to 'src/vendorcode/amd/fsp/phoenix/FspmUpd.h')
| -rw-r--r-- | src/vendorcode/amd/fsp/phoenix/FspmUpd.h | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/vendorcode/amd/fsp/phoenix/FspmUpd.h b/src/vendorcode/amd/fsp/phoenix/FspmUpd.h index 77d0d66e8a..ba15df8141 100644 --- a/src/vendorcode/amd/fsp/phoenix/FspmUpd.h +++ b/src/vendorcode/amd/fsp/phoenix/FspmUpd.h @@ -78,12 +78,7 @@ typedef struct __packed { /** Offset 0x041F**/ uint8_t audio_io_ctl; /** Offset 0x0420**/ uint8_t pdm_mic_selection; /** Offset 0x0421**/ uint8_t hda_enable; - /** Offset 0x0422**/ uint8_t nbio_reserved[31]; - /** Offset 0x0441**/ uint32_t emmc0_mode; - /** Offset 0x0445**/ uint16_t emmc0_init_khz_preset; - /** Offset 0x0447**/ uint8_t emmc0_sdr104_hs400_driver_strength; - /** Offset 0x0448**/ uint8_t emmc0_ddr50_driver_strength; - /** Offset 0x0449**/ uint8_t emmc0_sdr50_driver_strength; + /** Offset 0x0422**/ uint8_t nbio_reserved[40]; /** Offset 0x044A**/ uint8_t UnusedUpdSpace0[85]; /** Offset 0x049F**/ uint32_t gnb_ioapic_base; /** Offset 0x04A3**/ uint8_t gnb_ioapic_id; @@ -112,7 +107,7 @@ typedef struct __packed { #define IMAGE_REVISION_MAJOR_VERSION 0x01 #define IMAGE_REVISION_MINOR_VERSION 0x00 -#define IMAGE_REVISION_REVISION 0x05 +#define IMAGE_REVISION_REVISION 0x06 #define IMAGE_REVISION_BUILD_NUMBER 0x00 #endif |