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authorChris Wang <chris.wang@amd.corp-partner.google.com>2021-04-29 00:11:01 +0800
committerFelix Held <felix-coreboot@felixheld.de>2021-04-30 16:19:05 +0000
commit0679392177b25a418f8d601b049f841c9d79ba55 (patch)
treef7b534dbbef134c617f68284474c677a6653746f /src/vendorcode/amd/fsp/cezanne
parentca084b8db29ebf0eed63e5204213a15a6c8b3f53 (diff)
amd/cezanne: Add telemetry setting to UPD
Add telemetry setting to UPD, the value comes from the SDLE testing. BUG=b:182754399 TEST=Build & Boot guybrush Cq-Depend: chrome-internal:3787638 Signed-off-by: Chris Wang <chris.wang@amd.corp-partner.google.com> Change-Id: I9dd3643e9c582a41192130901935eef321b2c67e Reviewed-on: https://review.coreboot.org/c/coreboot/+/52733 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/fsp/cezanne')
-rw-r--r--src/vendorcode/amd/fsp/cezanne/FspmUpd.h8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
index 6e9a1f0969..f01af852d1 100644
--- a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
+++ b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h
@@ -102,8 +102,12 @@ typedef struct __packed {
/** Offset 0x04A4**/ uint8_t fch_ioapic_id;
/** Offset 0x04A5**/ uint8_t sata_enable;
/** Offset 0x04A6**/ uint8_t fch_reserved[32];
- /** Offset 0x04A7**/ uint8_t s0i3_enable;
- /** Offset 0x04C6**/ uint8_t UnusedUpdSpace0[57];
+ /** Offset 0x04C6**/ uint8_t s0i3_enable;
+ /** Offset 0x04C7**/ uint32_t telemetry_vddcrvddfull_scale_current;
+ /** Offset 0x04CB**/ uint32_t telemetry_vddcrvddoffset;
+ /** Offset 0x04CF**/ uint32_t telemetry_vddcrsocfull_scale_current;
+ /** Offset 0x04D3**/ uint32_t telemetry_vddcrsocOffset;
+ /** Offset 0x04D7**/ uint8_t UnusedUpdSpace0[41];
/** Offset 0x0500**/ uint16_t UpdTerminator;
} FSP_M_CONFIG;