diff options
| author | Julian Schroeder <julianmarcusschroeder@gmail.com> | 2021-05-11 10:44:13 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-26 15:15:53 +0000 |
| commit | d2f3308ad7efd01a2d23749aa4ccc6bc5efc8a56 (patch) | |
| tree | 2200586bb2ba0a5dabf6acf60dcfedcdc40adbe0 /src/vendorcode/amd/fsp/cezanne/FspmUpd.h | |
| parent | e84a014ee6121424593ded21591c3e759847b784 (diff) | |
soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY
The AMD FSP is using a new structure for USB and USB C phy settings.
This patch removes old, unused structures, adds the new one and
enables the devicetree interface for it.
Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I011ca40a334e4fd26778ca7f18b653298b14019b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Diffstat (limited to 'src/vendorcode/amd/fsp/cezanne/FspmUpd.h')
| -rw-r--r-- | src/vendorcode/amd/fsp/cezanne/FspmUpd.h | 28 |
1 files changed, 7 insertions, 21 deletions
diff --git a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h index f01af852d1..efb516f5e0 100644 --- a/src/vendorcode/amd/fsp/cezanne/FspmUpd.h +++ b/src/vendorcode/amd/fsp/cezanne/FspmUpd.h @@ -1,6 +1,6 @@ /** @file * - * This file is automatically generated. + * This file is _NOT_ automatically generated in coreboot! * */ @@ -8,6 +8,7 @@ #define __FSPMUPD_H__ #include <FspUpd.h> +#include <FspUsb.h> #define FSPM_UPD_DXIO_DESCRIPTOR_COUNT 14 #define FSPM_UPD_DDI_DESCRIPTOR_COUNT 5 @@ -79,24 +80,7 @@ typedef struct __packed { /** Offset 0x0447**/ uint8_t emmc0_sdr104_hs400_driver_strength; /** Offset 0x0448**/ uint8_t emmc0_ddr50_driver_strength; /** Offset 0x0449**/ uint8_t emmc0_sdr50_driver_strength; - /** Offset 0x044A**/ uint8_t fch_usb_version_major; - /** Offset 0x044B**/ uint8_t fch_usb_version_minor; - /** Offset 0x044C**/ uint8_t fch_usb_2_port0_phy_tune[9]; - /** Offset 0x0455**/ uint8_t fch_usb_2_port1_phy_tune[9]; - /** Offset 0x045E**/ uint8_t fch_usb_2_port2_phy_tune[9]; - /** Offset 0x0467**/ uint8_t fch_usb_2_port3_phy_tune[9]; - /** Offset 0x0470**/ uint8_t fch_usb_2_port4_phy_tune[9]; - /** Offset 0x0479**/ uint8_t fch_usb_2_port5_phy_tune[9]; - /** Offset 0x0482**/ uint8_t fch_usb_2_port6_phy_tune[9]; - /** Offset 0x048B**/ uint8_t fch_usb_2_port7_phy_tune[9]; - /** Offset 0x0494**/ uint8_t fch_usb_device_removable; - /** Offset 0x0495**/ uint8_t fch_usb_3_port_force_gen1; - /** Offset 0x0496**/ uint8_t fch_usb_u3_rx_det_wa_enable; - /** Offset 0x0497**/ uint8_t fch_usb_u3_rx_det_wa_portmap; - /** Offset 0x0498**/ uint8_t fch_usb_early_debug_select_enable; - /** Offset 0x0499**/ uint32_t xhci_oc_pin_select; - /** Offset 0x049D**/ uint8_t xhci0_force_gen1; - /** Offset 0x049E**/ uint8_t xhci_sparse_mode_enable; + /** Offset 0x044A**/ uint8_t UnusedUpdSpace0[85]; /** Offset 0x049F**/ uint32_t gnb_ioapic_base; /** Offset 0x04A3**/ uint8_t gnb_ioapic_id; /** Offset 0x04A4**/ uint8_t fch_ioapic_id; @@ -107,8 +91,10 @@ typedef struct __packed { /** Offset 0x04CB**/ uint32_t telemetry_vddcrvddoffset; /** Offset 0x04CF**/ uint32_t telemetry_vddcrsocfull_scale_current; /** Offset 0x04D3**/ uint32_t telemetry_vddcrsocOffset; - /** Offset 0x04D7**/ uint8_t UnusedUpdSpace0[41]; - /** Offset 0x0500**/ uint16_t UpdTerminator; + /** Offset 0x04D7**/ uint8_t UnusedUpdSpace1; + /** Offset 0x04D8**/ struct usb_phy_config *usb_phy; + /** Offset 0x04DC**/ uint8_t UnusedUpdSpace2[292]; + /** Offset 0x0600**/ uint16_t UpdTerminator; } FSP_M_CONFIG; /** Fsp M UPD Configuration |