diff options
author | Aaron Durbin <adurbin@chromium.org> | 2014-01-30 22:20:01 -0600 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2014-02-11 22:23:15 +0100 |
commit | d907a3402e347633bac09013050a3d290c27d1f8 (patch) | |
tree | 1953b397aafc0816d2e1ed332ba06aedee98b88f /src/vendorcode/amd/cimx/sb900/SbCmn.c | |
parent | 6ecdb68562989aec1362e3a99f3ed2e0012e1191 (diff) |
amd/cimx: fix sb(8|9)00 NULL type redefine
It is inappropriate for chipset code to be redefining
types -- especially NULL to a non-pointer type. There's
only one non-straight forward change. A condition
being checked was '!ptr_type == NULL' (0 as int). That
check is actually 'ptr_type != NULL'.
Change-Id: Iab5733e5a573baba6fec94e0c955ba4fad72c836
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5088
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/vendorcode/amd/cimx/sb900/SbCmn.c')
-rw-r--r-- | src/vendorcode/amd/cimx/sb900/SbCmn.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/vendorcode/amd/cimx/sb900/SbCmn.c b/src/vendorcode/amd/cimx/sb900/SbCmn.c index 29f6fd1d80..bd50ddeb22 100644 --- a/src/vendorcode/amd/cimx/sb900/SbCmn.c +++ b/src/vendorcode/amd/cimx/sb900/SbCmn.c @@ -398,7 +398,7 @@ commonInitEarlyBoot ( RWMEM (ACPI_MMIO_BASE + PMIO_BASE + SB_PMIOA_REGC8 + 1, AccWidthUint8, ~BIT6, 0); //Early post initialization of pci config space programPciByteTable ((REG8MASK*) FIXUP_PTR (&sbEarlyPostByteInitTable[0]), sizeof (sbEarlyPostByteInitTable) / sizeof (REG8MASK) ); - if ( pConfig->BuildParameters.SmbusSsid != NULL ) { + if ( pConfig->BuildParameters.SmbusSsid != 0 ) { RWPCI ((SMBUS_BUS_DEV_FUN << 16) + SB_CFG_REG2C, AccWidthUint32 | S3_SAVE, 0x00, pConfig->BuildParameters.SmbusSsid); } //Make BAR registers of smbus invisible. @@ -408,7 +408,7 @@ commonInitEarlyBoot ( // LPC CFG programming // // SSID for LPC Controller - if (pConfig->BuildParameters.LpcSsid != NULL ) { + if (pConfig->BuildParameters.LpcSsid != 0 ) { RWPCI ((LPC_BUS_DEV_FUN << 16) + SB_LPC_REG2C, AccWidthUint32 | S3_SAVE, 0x00, pConfig->BuildParameters.LpcSsid); } // LPC MSI |