summaryrefslogtreecommitdiff
path: root/src/vendorcode/amd/cimx/sb900/Debug.c
diff options
context:
space:
mode:
authorMarshall Dawson <marshalldawson3rd@gmail.com>2020-10-27 16:32:11 -0600
committerFelix Held <felix-coreboot@felixheld.de>2020-10-30 13:03:23 +0000
commit902518e983d5aa3c1fdb5dfd91ca1fb468117191 (patch)
treed989485c7b9187cfa4e664b785b20b4d39945e5e /src/vendorcode/amd/cimx/sb900/Debug.c
parentc5e28abaf803465ae4bfec1904618497e077ca50 (diff)
soc/amd/picasso: Fix the PSP SMI trigger info
Align coreboot's PSP MboxBiosCmdSmmInfo setup to how AGESA's PSP library was implemented. The trigger address must be an SMI trigger register. Assign one of the reserved triggers to the PSP. The #define of SMITYPE_PSP 33 is still correct and is intentionally unmodified. This patch should be innocuous as the system doesn't currently support SMI-based features of the PSP. The call only exists so the PSP will honor a mailbox command during S3 suspend. BUG=b:171815390 TEST=Run SST on Morphius BRANCH=Zork Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Change-Id: I74029271a522a4f23e54fd76f99a8e3eb0dd4d55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/46854 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/vendorcode/amd/cimx/sb900/Debug.c')
0 files changed, 0 insertions, 0 deletions